Power switch arrangement

Abstract

A power device can be structured with a power switch having multiple arrangements such that the power switch can operate as a power switch with the capability to measure properties of the power switch. An example power device can comprise a main arrangement of transistor cells and a sensor arrangement of sensor transistor cells. The main arrangement can be structured to operate as a power switch, with the transistor cells of the main arrangement having control nodes connected in parallel to receive a common control signal. The sensor arrangement of sensor transistor cells can be structured to measure one or more parameters of the main arrangement, with the sensor transistor cells having sensor control nodes connected in parallel to receive a common sensor control signal. The sensor transistor cells can have a common transistor terminal shared with a common transistor terminal of the transistor cells of the main arrangement.

What is claimed is: 
     
       1. A power device comprising:
 a first number of transistors arranged as a power switch, with the transistors having control nodes connected in parallel to receive a common control signal to the first number of transistors; and 
 a second number of sensor transistors arranged to measure one or more parameters of the power switch including a junction temperature of the power switch, with the sensor transistors having sensor control nodes connected in parallel to receive a common sensor control signal to the sensor transistors with the sensor control nodes separate from the control nodes of the transistors arranged as the power switch, the sensor transistors having a common transistor region that is shared with a transistor region of the transistors of the power switch, with a ratio of the first number to the second number being greater than ten; 
 wherein the transistors arranged as the power switch and the sensor transistors include field effect transistors and the common transistor region is a transistor drain for the transistors arranged as the power switch and the sensor transistors, with the sources of the transistors arranged as the power switch conductively coupled together and the sources of the sensor transistors conductively coupled together; and 
 control and calibration circuitry configured to calculate the junction temperature of the sensor transistors using a known value of an internal gate resistance of the sensor transistors at a specified temperature and a known temperature coefficient for material of the gates of the sensor transistors. 
 
     
     
       2. The power device of  claim 1 , wherein the control and calibration circuitry is configured to measure a voltage of the power switch, and determine a current of the power switch using the junction temperature and voltage of the power switch. 
     
     
       3. The power device of  claim 1 , wherein the power device includes control circuitry to control operation of the power switch or the sensor transistor to determine values of the one or more parameters, and to transmit digital signals representing the determined values. 
     
     
       4. The power device of  claim 1 , wherein the transistors arranged as the power switch and the sensor transistors have substantially equal electrical properties. 
     
     
       5. The power device of  claim 1 , wherein the sources of the transistors arranged as the power switch and the sources of the sensor transistors are disposed on a top side of a substrate with the transistor drain disposed on a backside of the substrate vertically separated from the top side. 
     
     
       6. The power device of  claim 1 , wherein the transistors arranged as the power switch and the sensor transistors are integrated in silicon technology, silicon carbide technology, or gallium nitride technology. 
     
     
       7. The power device of  claim 1 , wherein the control and calibration circuitry includes circuitry to:
 measure a drain-to-source voltage of the transistors arranged as the power switch, using a resistor coupling the source of the transistors arranged as the power switch to the source of the sensor transistors; 
 calculate drain current of the transistors arranged as the power switch using the calculated junction temperature, the measurement of the drain-to-source voltage, a known drift resistance in material of the drain, and a known temperature coefficient of the drift resistance; and 
 output values of the junction temperature and the drain current. 
 
     
     
       8. A method of operating a power switch, the method comprising:
 operating sensor transistors with respect to transistors arranged as a power switch, with the sensor transistors having control nodes connected in parallel, separate from the transistors arranged as a power switch, the sensor transistors having a common transistor region that is shared with a transistor region of the transistors of the power switch, with a ratio of the transistors arranged as the power switch to the sensor transistors being greater than ten; 
 generating a control signal to the control nodes of the sensor transistors; 
 measuring a voltage between two transistor regions of the sensor transistors in response to the control signal; 
 calculating, in control and calibration circuitry, a junction temperature of the sensor transistors from the measured voltage; and 
 controlling, in the control and calibration circuitry, the on and off times of the sensor transistors to turn the sensor transistors on after turning on the transistors arranged as the power switch and to turn the sensor transistors off before turning off the transistors arranged as the power switch. 
 
     
     
       9. The method of  claim 8 , wherein the transistors arranged as the power switch and the sensor transistors include field effect transistors and the common transistor region is a transistor drain for the transistors arranged as the power switch and the sensor transistors, with the sources of the transistors arranged as the power switch conductively coupled together and the sources of the sensor transistors conductively coupled together. 
     
     
       10. The method of  claim 9 , wherein the method includes calculating, in the control and calibration circuitry, the junction temperature of the sensor transistors using a known value of an internal gate resistance of the sensor transistors at a specified temperature and a known temperature coefficient for material of the gates of the sensor transistors. 
     
     
       11. The method of  claim 10 , wherein the method includes in the control and calibration circuitry:
 measuring a drain-to-source voltage of the transistors arranged as the power switch, using a resistor coupling the source of the transistors arranged as the power switch to the source of the sensor transistors; 
 calculating a drain current of the transistors arranged as the power switch using the calculated junction temperature, the measurement of the drain-to-source voltage, a known drift resistance in material of the drain, and a known temperature coefficient of the drift resistance; and 
 outputting values of the junction temperature or the drain current. 
 
     
     
       12. The method of  claim 8 , wherein the method includes, with the transistors arranged as the power switch being field effect transistors, outputting a digital signal from the control and calibration circuitry, the digital signal representing the calculated junction temperature or a value of a drain current of the transistors arranged as the power switch. 
     
     
       13. The method of  claim 8 , wherein the method includes generating, in the control and calibration circuitry, a current to the sensor transistors for calculating the junction temperature. 
     
     
       14. A method of constructing a power device, the method comprising:
 forming an array of transistors; 
 arranging a first number of transistors of the array as a power switch, with the first number of transistors of the array arranged as a power switch having control nodes connected in parallel to receive a common control signal to the first number of transistors; and 
 arranging a second number of transistors of the array as sensor transistors to measure one or more parameters of the power switch including a junction temperature of the power switch, with the sensor transistors having sensor control nodes connected in parallel to receive a common sensor control signal to the sensor transistors with the sensor control nodes separate from the control nodes of the transistors arranged as the power switch; 
 forming the sensor transistors having a common transistor region that is shared with a transistor region of the transistors of the power switch, with a ratio of the first number to the second number being greater than ten; and 
 forming control and calibration circuitry configured to calculate the junction temperature of the sensor transistors using a known value of an internal gate resistance of the sensor transistors at a specified temperature and a known temperature coefficient for material of the gates of the sensor transistors. 
 
     
     
       15. The method of  claim 14 , wherein the method includes:
 forming the sources of the transistors arranged as the power switch and the sources of the sensor transistors disposed on a top side of a substrate; and 
 forming the transistor drain disposed on a backside of the substrate vertically separated from the top side. 
 
     
     
       16. The method of  claim 14 , wherein the method includes forming the transistors arranged as the power switch and the sensor transistors integrated in silicon technology, silicon carbide technology, or gallium nitride technology. 
     
     
       17. The method of  claim 14 , forming the transistors arranged as the power switch and the sensor transistors includes:
 forming the transistors arranged as the power switch and the sensor transistors as field effect transistors; 
 forming the common transistor region as a transistor drain for the transistors arranged as the power switch and the sensor transistors; 
 forming the sources of the transistors arranged as the power switch conductively coupled together; and 
 forming the sources of the sensor transistors conductively coupled together.