US11699745B2ActiveUtilityPatentIndex 62

Thyristor

Assignee: MACRONIX INT CO LTDPriority: Oct 28, 2021Filed: Oct 28, 2021Granted: Jul 11, 2023

Est. expiryOct 28, 2041(~15.3 yrs left)· nominal 20-yr term from priority

Inventors:WANG SHIH-YU HUANG WEN-TSUNG HSU CHIH-WEI

H01L 29/102H01L 29/7408H01L 29/1016H10D 62/206H10D 62/199H10D 89/713H10D 89/611H10D 18/00H10D 62/124H10D 84/133H10D 8/80H02H 7/205H02H 9/04

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Claims

Abstract

A thyristor includes a first transistor and a second transistor. The first transistor has a first end serving as an anode end. The second transistor has a control end coupled to a second end of the first transistor, a first end coupled to a control end of the first transistor, and a second end coupled to the first end of the second transistor and serving as a cathode end.

Claims

exact text as granted — not AI-modified

What is claimed is: 
     
       1. A thyristor, comprising:
 a first transistor, having a first end serving as an anode end; and 
 a second transistor, having a control end coupled to a second end of the first transistor, a first end coupled to a control end of the first transistor, and a second end coupled to the first end of the second transistor and serving as a cathode end. 
 
     
     
       2. The thyristor described in  claim 1 , wherein the first transistor is a PNP-type bipolar transistor and the second transistor is an NPN-type bipolar transistor, the first end of the first transistor is an emitter, the second end of the first transistor is a collector, the second end of the second transistor is an emitter, and the first end of the second transistor is a collector. 
     
     
       3. The thyristor described in  claim 1 , further comprising:
 a first resistor, coupled between the second end of the first transistor and the control end of the second transistor; and 
 a second resistor, coupled between the first end of the second transistor and the control end of the first transistor. 
 
     
     
       4. The thyristor described in  claim 1 , wherein when a forward bias is received between the anode end and the cathode end, a first conduction path is formed between the first end of the first transistor, the control end of the first transistor and the first end of the second transistor, and a second conduction path is formed between the first end of the first transistor, the control end of the first transistor, the first end of the second transistor, the second end of the first transistor, the control end of the second transistor and the second end of the second transistor. 
     
     
       5. A thyristor, comprising:
 a first well region; 
 a first heavily doped region, disposed in the first well region and electrically coupled to an anode end; 
 a second heavily doped region, disposed in the first well region and electrically coupled to a cathode end; 
 a second well region; and 
 a third heavily doped region, disposed in the second well region and electrically coupled to the cathode end. 
 
     
     
       6. The thyristor described in  claim 5 , wherein electrical conduction types of the first well region, the second heavily doped region, and the third heavily doped region are a same first electrical conduction type, electrical conduction types of the first heavily doped region and the first well region are a same second electrical conduction type, and the second well region is disposed in the first well region, wherein the first electrical conduction type is an N type and the second electrical conduction type is a P type. 
     
     
       7. The thyristor described in  claim 6 , wherein the first heavily doped region, the first well region, and the second well region form a first transistor, and the first well region, the third heavily doped region, and the second well region form a second transistor. 
     
     
       8. The thyristor described in  claim 7 , wherein the first transistor is a PNP-type bipolar transistor and the second transistor is an NPN-type bipolar transistor. 
     
     
       9. The thyristor described in  claim 5 , further comprising:
 a deep well region, disposed in the first well region, 
 wherein the second well region is disposed in the deep well region, and the second heavily doped region is disposed in the deep well region. 
 
     
     
       10. The thyristor described in  claim 9 , wherein electrical conduction types of the substrate, the first heavily doped region, and the second well region are a same first electrical conduction type, electrical conduction types of the second heavily doped region, the third heavily doped region, and the deep well region are a same second electrical conduction type, and the first electrical conduction type is complementary to the second electrical conduction type, the first electrical conduction type is a P type and the second electrical conduction type is an N type. 
     
     
       11. The thyristor described in  claim 10 , wherein the first heavily doped region, the first well region, the deep well region, and the second well region form a first transistor, and the second heavily doped region, the second well region, the deep well region, and the third heavily doped region form a second transistor. 
     
     
       12. The thyristor described in  claim 11 , wherein the first transistor is a PNP-type bipolar transistor and the second transistor is an NPN-type bipolar transistor. 
     
     
       13. The thyristor described in  claim 5 , further comprising:
 a third well region, disposed in the first well region, 
 wherein the first heavily doped region is disposed in the third well region, and the third well region and the second well region are isolated from each other. 
 
     
     
       14. The thyristor described in  claim 13 , wherein electrical conduction types of the first heavily doped region, the second well region, and the third well region are a same first electrical conduction type, electrical conduction types of the first well region, the second heavily doped region, and the third heavily doped region are a same second electrical conduction type, and the first electrical conduction type is complementary to the second electrical conduction type, the first electrical conduction type is a P type and the second electrical conduction type is an N type. 
     
     
       15. The thyristor described in  claim 14 , wherein the first heavily doped region, the third well region, the first well region, and the second well region form a first transistor, and the second heavily doped region, the second well region, the first well region, and the third heavily doped region form a second transistor. 
     
     
       16. The thyristor described in  claim 15 , wherein the first transistor is a PNP-type bipolar transistor and the second transistor is an NPN-type bipolar transistor. 
     
     
       17. The thyristor described in  claim 5 , wherein the first well region is disposed in the second well region. 
     
     
       18. The thyristor described in  claim 17 , wherein the first well region is an N-type deep well region. 
     
     
       19. The thyristor described in  claim 17 , further comprising:
 a third well region, disposed in the second well region, wherein the third heavily doped region is disposed in the third well region, and the third well region is isolated to the first well region. 
 
     
     
       20. The thyristor described in  claim 19 , wherein the second well region and the third well region are both N-type deep well regions.

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