System, apparatus and method for extended communication modes for a multi-drop interconnect

Abstract

In one embodiment, an apparatus includes a host controller to couple to an interconnect to which a plurality of devices may be coupled. The host controller may include: a first driver to drive first information onto a first line of the interconnect; a second driver to drive a clock signal onto a second line of the interconnect; and a mode control circuit to cause the second driver to drive the clock signal onto the second line of the interconnect in a first mode and to cause the first driver and the second driver to drive differential information onto the first line and the second line of the interconnect in a second mode. Other embodiments are described and claimed.

What is claimed is: 
     
       1. An apparatus comprising:
 a first driver to drive first information onto a first line of an Improved Inter Integrated Circuit (I3C) bus; 
 a second driver to drive a clock signal onto a second line of the I3C bus; and 
 a mode control circuit to cause the first driver to drive first data information onto the first line of the I3C bus and cause the second driver to drive the clock signal onto the second line of the I3C bus in a single-ended manner in a first mode, and to cause the first driver and the second driver to drive differential data information onto the first line and the second line of the I3C bus in a differential manner in a second mode. 
 
     
     
       2. The apparatus of  claim 1 , wherein the second mode comprises a differential mode and a native communication protocol of the I3C bus comprises a single-ended protocol. 
     
     
       3. The apparatus of  claim 1 , wherein the apparatus does not drive the clock signal onto the I3C bus in the second mode. 
     
     
       4. The apparatus of  claim 1 , wherein the second mode comprises a super high data rate (SHDR) mode. 
     
     
       5. The apparatus of  claim 1 , wherein the apparatus comprises a host controller to be a bus master for the I3C bus. 
     
     
       6. The apparatus of  claim 5 , wherein the host controller comprises a storage to store a table having a plurality of entries each to store capability information for one of a plurality of devices, the capability information to indicate whether the device is able to communicate according to the second mode. 
     
     
       7. The apparatus of  claim 1 , wherein the apparatus is to communicate the differential data information at a voltage swing less than a low voltage threshold level for the I3C bus. 
     
     
       8. The apparatus of  claim 1 , wherein the apparatus is to send a first common control code along the first line of the I3C bus to cause one or more of a plurality of devices to enter into the second mode. 
     
     
       9. The apparatus of  claim 8 , wherein after the first common control code is sent, the apparatus is to send an entry pattern via the first line of the I3C bus and the second line of the I3C bus. 
     
     
       10. The apparatus of  claim 9 , wherein the apparatus is to send the entry pattern differentially at a voltage swing smaller than a low voltage threshold of the I3C bus. 
     
     
       11. The apparatus of  claim 9 , wherein, after the entry pattern is sent, the apparatus is to send a message via the first and second lines of the I3C bus at a voltage swing smaller than a low voltage threshold of the I3C bus. 
     
     
       12. The apparatus of  claim 11 , wherein after the message is sent, the apparatus is to send an exit pattern via the first and second lines of the I3C bus, to cause the one or more of the plurality of devices to exit the second mode. 
     
     
       13. A method comprising:
 sending a command code on a data line of an Improved Inter Integrated Circuit (I3C) bus in a single-ended manner to indicate transition of the I3C bus into a differential communication mode; 
 sending a differential entry pattern on the data line and a clock line of the I3C bus in a differential manner; and 
 thereafter sending a message comprising differential data information differentially, at a voltage swing smaller than a low voltage threshold, on the data line and the clock line of the I3C bus. 
 
     
     
       14. The method of  claim 13 , further comprising sending the message comprising the differential data information differentially at a first data rate, the first data rate a super high data rate. 
     
     
       15. The method of  claim 13 , further comprising receiving a capability message from at least one device coupled to the I3C bus to indicate a capability for the differential communication mode. 
     
     
       16. The method of  claim 15 , further comprising sending the message to the at least one device with an address of the at least one device. 
     
     
       17. The method of  claim 13 , further comprising after sending the message, raising the data line of the I3C bus to a supply voltage level to release the I3C bus. 
     
     
       18. A system comprising:
 a first device having:
 a first transceiver coupled to a data line of an Improved Inter Integrated Circuit (I3C) bus; 
 a second transceiver coupled to a clock line of the I3C bus; and 
 wherein in a first mode the first transceiver is to communicate single-ended data via the data line of the I3C bus and the second transceiver is to communicate a clock signal via the clock line of the I3C bus, and in a second mode the first transceiver and the second transceiver are to communicate differential data at a voltage swing lower than a voltage swing of the I3C bus via the data line and the clock line; 
 
 the I3C bus coupled to the first device; 
 a second device coupled to the I3C bus, wherein the second device is to participate in communication with the first device in at least the first mode; and 
 a third device coupled to the I3C bus, wherein the third device is to participate in communication with the first device in at least the second mode. 
 
     
     
       19. The system of  claim 18 , wherein, in the second mode, the first device is to send a first broadcast message via the I3C bus to indicate an upcoming communication, and send a second broadcast message to configure at least the third device for the second mode, the second mode comprising a super high data rate mode. 
     
     
       20. The system of  claim 18 , wherein the second device comprises an I 2 C device, wherein communication in the second mode is transparent to the second device.