US11721765B2ActiveUtilityA1

Semiconductor device and method of manufacturing semiconductor device

73
Assignee: JAPAN DISPLAY INCPriority: Feb 12, 2019Filed: Oct 13, 2021Granted: Aug 8, 2023
Est. expiryFeb 12, 2039(~12.6 yrs left)· nominal 20-yr term from priority
H10P 95/00H10P 50/282H10P 30/22H10P 14/69391H10P 14/3434H10D 30/6736H10D 99/00H10D 86/471H10D 86/441H10D 86/423H10D 86/0221H10D 86/60H10D 62/80H10D 30/6755H10D 30/6745H10D 30/6739H10D 30/6731H10D 30/6723H10D 30/673H10D 30/6719H10D 30/6715H01L 29/78627H01L 21/02178H01L 21/02565H01L 21/426H01L 21/47573H01L 21/47635H01L 27/124H01L 27/127H01L 27/1225H01L 27/1251H01L 29/24H01L 29/42384H01L 29/4908H01L 29/66969H01L 29/7869H01L 29/78633H01L 29/78675G02F 1/1368H01L 2029/42388
73
PatentIndex Score
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Cited by
14
References
5
Claims

Abstract

A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of manufacturing a semiconductor device with a thin film transistor having an oxide semiconductor which includes a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region, the low concentration regions being located between the channel region and the drain region, and between the channel region and the source region, comprising steps of:
 selectively forming a semiconductor layer of the thin film transistor on a substrate; 
 forming a gate insulating film so as to cover the semiconductor layer; 
 forming an aluminum oxide film on the gate insulating film; 
 selectively patterning the aluminum oxide film so as to be locate on the channel region; 
 forming a gate electrode on the gate insulating film and on the aluminum oxide film selectively patterned; 
 selectively patterning the gate electrode so as to be located on the aluminum oxide film selectively patterned and on the low concentration regions; and 
 performing ion implantation by using the gate electrode selectively patterned as a mask. 
 
     
     
       2. The method of manufacturing the semiconductor device according to  claim 1 , further comprising steps of:
 forming an insulating film so as to cover the gate electrode selectively patterned and the gate insulating film; 
 forming contact holes in the insulating film and the gate insulating film in such a manner that the drain region and the source region are exposed; and 
 forming wirings in the contact holes. 
 
     
     
       3. The method of manufacturing the semiconductor device according to  claim 1 ,
 wherein a film thickness of the aluminum oxide film is 5 nm to 20 nm. 
 
     
     
       4. The method of manufacturing the semiconductor device according to  claim 1 ,
 wherein a step of forming the gate electrode on the gate insulating film includes an annealing treatment. 
 
     
     
       5. The method of manufacturing the semiconductor device according to  claim 4 ,
 wherein the gate electrode sucks up the oxygen in the drain region, the source region, and the low concentration regions with the annealing treatment.

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