Rectifier backflow reduction via biasing

Abstract

Backflow in rectifiers may be reduced via biasing. Upon determining that backflow within a rectifier is likely, one or more rectifying elements in the rectifier may be debiased, via analog or digital means. The debiased rectifying elements become less conductive or nonconductive, thereby reducing or preventing backflow. The determination of backflow likelihood may be performed based on a signal to be backscattered or the amplitude-modulated envelope of an incident RF wave, and may be digital or analog in nature.

We claim: 
     
       1. A Radio Frequency Identification (RFID) integrated circuit (IC) comprising:
 an input node configured to receive an RF signal; 
 a modulator configured to modulate a reflectance of an antenna coupled to the input node to generate a backscatter signal from the RF signal; 
 a rectifier for rectifying the RF signal and including a plurality of serially coupled rectifying elements defining a main current path; and 
 a processor block configured to:
 detect a signal from the modulator; 
 determine, based on the detected signal, whether to debias the rectifier or reverse a debiasing of the rectifier; 
 in response to a determination to debias the rectifier, couple a debiasing voltage to at least a first one of the plurality of rectifying elements to reduce a bias of the first rectifying element, thereby reducing a conductivity of the first rectifying element; and 
 in response to a determination to reverse the debiasing of the rectifier, isolate the debiasing voltage from at least the first rectifying element. 
 
 
     
     
       2. The RFID IC of  claim 1 , wherein the processor block is further configured to:
 reduce the bias of the first rectifying element by causing a break in a resistive ladder structure configured to provide bias voltages to the plurality of rectifying elements in the rectifier; and 
 reduce the biases of the plurality of rectifying elements by causing the break. 
 
     
     
       3. The RFID IC of  claim 1 , wherein:
 the debiasing voltage has a first amplitude; and 
 the processor block is further configured to reverse the debiasing of the first rectifying element by coupling a bias voltage having a second amplitude distinct from the first amplitude. 
 
     
     
       4. The RFID IC of  claim 1 , further comprising a bias-sampling capacitance coupled to the first rectifying element, wherein the processor block is further configured to:
 use the bias-sampling capacitance to combine a first bias voltage of the first rectifying element with the debiasing voltage to reduce the bias of the first rectifying element. 
 
     
     
       5. The RFID IC of  claim 1 , wherein:
 the plurality of rectifying elements includes the first rectifying element and a second rectifying element associated with a first bias-sampling capacitance and a second bias-sampling capacitance, respectively; 
 the first and second rectifying elements have differing first and second bias voltages; and 
 the processor block is configured to:
 use the first bias-sampling capacitor to combine the first bias voltage with the debiasing to reduce the bias of the first rectifying element; and 
 use the second bias-sampling capacitance to combine the second bias voltage with the debiasing voltage to reduce a bias of the second rectifying element. 
 
 
     
     
       6. The RFID IC of  claim 1 , wherein:
 the signal from the modulator causes the modulator to short contacts of the input node together; and 
 the processor block is configured to determine whether to debias the rectifier or reverse the debiasing of the rectifier based on a value of the detected signal. 
 
     
     
       7. The RFID IC of  claim 1 , wherein:
 the signal from the modulator causes the modulator to reverse a short-circuiting of contacts of the input node; and 
 the processor block is configured to determine whether to debias the rectifier or reverse the debiasing of the rectifier based on a value of the detected signal. 
 
     
     
       8. A Radio Frequency Identification (RFID) integrated circuit (IC) comprising:
 an input node configured to receive an RF signal; 
 a modulator configured to modulate a reflectance of an antenna coupled to the input node to generate a backscatter signal from the RF signal; 
 a rectifier for rectifying the RF signal and including a plurality of serially coupled rectifying elements defining a main current path; and 
 a processor block configured to:
 detect a signal sent to the modulator and associated with generating the backscatter signal; 
 determine, based on the signal to the modulator, whether to debias the rectifier or reverse a debiasing of the rectifier; 
 in response to a determination to debias the rectifier, couple a debiasing voltage to at least a first one of the plurality of rectifying elements to reduce a bias of the first rectifying element, thereby reducing a conductivity of the first rectifying element; and 
 in response to a determination to reverse the debiasing of the rectifier, isolate the debiasing voltage from at least the first rectifying element. 
 
 
     
     
       9. The RFID IC of  claim 8 , wherein the processor block is further configured to:
 reduce the bias of the first rectifying element by causing a break in a resistive ladder structure configured to provide bias voltages to the plurality of rectifying elements in the rectifier; and 
 reduce the biases of the plurality of rectifying elements by causing the break. 
 
     
     
       10. The RFID IC of  claim 8 , wherein:
 the debiasing voltage has a first amplitude; and 
 the processor block is further configured to reverse the debiasing of the first rectifying element by coupling a bias voltage having a second amplitude distinct from the first amplitude. 
 
     
     
       11. The RFID IC of  claim 8 , further comprising a bias-sampling capacitance coupled to the first rectifying element, wherein the processor block is further configured to:
 use the bias-sampling capacitance to combine a first bias voltage of the first rectifying element with the debiasing voltage to reduce the bias of the first rectifying element. 
 
     
     
       12. The RFID IC of  claim 8 , wherein:
 the plurality of rectifying elements includes the first rectifying element and a second rectifying element associated with a first bias-sampling capacitance and a second bias-sampling capacitance, respectively; 
 the first and second rectifying elements have differing first and second bias voltages; and 
 the processor block is configured to:
 use the first bias-sampling capacitor to combine the first bias voltage with the debiasing to reduce the bias of the first rectifying element; and 
 use the second bias-sampling capacitance to combine the second bias voltage with the debiasing voltage to reduce a bias of the second rectifying element. 
 
 
     
     
       13. The RFID IC of  claim 8 , wherein:
 the signal sent to the modulator causes the modulator to short contacts of the input node; and 
 the processor block is configured to determine whether to debias the rectifier or reverse the debiasing of the rectifier based on a value of the signal sent to the modulator. 
 
     
     
       14. The RFID IC of  claim 8 , wherein:
 the signal transmitted to the modulator causes the modulator to reverse a short-circuiting of contacts of the input node; and 
 the processor block is configured to determine whether the rectifier debiasing or the rectifier debiasing reversal is to occur based on a value of the transmitted signal. 
 
     
     
       15. A method to reduce backflow in a Radio Frequency Identification (RFID) integrated circuit (IC) rectifier, the method comprising:
 determining, at a processor block, whether to debias the rectifier or reverse a debiasing of the rectifier based on a signal of the RFID IC associated with a modulation of a backscatter signal; 
 in response to a determination to debias the rectifier, couple a debiasing voltage to at least a first one of the plurality of rectifying elements to reduce a bias of the first rectifying element, thereby reducing a conductivity of the first rectifying element; and 
 in response to a determination to reverse the debiasing of the rectifier, isolate the debiasing voltage from at least the first rectifying element. 
 
     
     
       16. The method of  claim 15 , further comprising:
 reducing the bias of the first rectifying element by causing a break in a resistive ladder structure configured to provide bias voltages to the plurality of rectifying elements in the rectifier; and 
 reducing the biases of the plurality of rectifying elements by causing the break. 
 
     
     
       17. The method of  claim 15 , wherein:
 the debiasing voltage has a first amplitude; and 
 the method further comprises reversing the debiasing of the first rectifying element by coupling a bias voltage having a second amplitude distinct from the first amplitude. 
 
     
     
       18. The method of  claim 15 , further comprising:
 using a bias-sampling capacitance coupled to the first rectifying element to combine a first bias voltage of the first rectifying element with the debiasing voltage to reduce the bias of the first rectifying element. 
 
     
     
       19. The method of  claim 15 , further comprising:
 using a first bias-sampling capacitor associated with a first rectifying element of the plurality of rectifying elements to combine a first bias voltage of the first rectifying element with the debiasing voltage to reduce the bias of the first rectifying element; and 
 using a second bias-sampling capacitance associated with a second rectifying element of the plurality of rectifying elements to combine a second bias voltage of the second rectifying element with the debiasing voltage to reduce a bias of the second rectifying element, wherein the first and second bias voltages differ. 
 
     
     
       20. The method of  claim 15 , wherein the signal associated with the modulation of the backscatter signal is a signal to or from a modulator of the IC for shorting contacts of an input node of the IC or reversing a short-circuiting of the contacts.