Three-level buck converter configurable for two-level buck converter mode operation

Abstract

A three-level buck converter circuit configurable to transition between a three-level buck converter mode and a two-level buck converter mode and methods for regulating power using such a circuit. One example power supply circuit generally includes a three-level buck converter circuit and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode. The three-level buck converter circuit generally includes a first switch, a second switch coupled to the first switch via a first node, a third switch coupled to the second switch via a second node, a fourth switch coupled to the third switch via a third node, a first capacitive element coupled between the first node and the third node, and an inductive element coupled between the second node and an output node.

What is claimed is: 
     
       1. A power supply circuit comprising: a three-level buck converter circuit having: a first switch; a second switch coupled to the first switch via a first node; a third switch coupled to the second switch via a second node; a fourth switch coupled to the third switch via a third node; a first capacitive element coupled between the first node and the third node; and an inductive element coupled between the second node and an output node; and a control circuit coupled to the three-level buck converter circuit and configured to control operation of the three-level buck converter circuit between a three-level buck converter mode and a two-level buck converter mode, wherein in the two-level buck converter mode, the control circuit is configured to: control closure of the first switch and the second switch and control opening of the third switch and the fourth switch, in a first phase of the two-level buck converter mode; and control opening of the first switch and the second switch and control closure of the third switch and the fourth switch, in a second phase of the two-level buck converter mode. 
     
     
       2. The power supply circuit of  claim 1 , wherein the control circuit is configured to control operation of the three-level buck converter circuit to enter the two-level buck converter mode based on an output current of the three-level buck converter circuit being lower than a first threshold. 
     
     
       3. The power supply circuit of  claim 2 , wherein the first threshold is 300 mA. 
     
     
       4. The power supply circuit of  claim 2 , wherein the control circuit is configured to control operation of the three-level buck converter circuit to exit the two-level buck converter mode based on the output current of the three-level buck converter circuit being higher than a second threshold, wherein the second threshold is higher than the first threshold. 
     
     
       5. The power supply circuit of  claim 1 , wherein in the two-level buck converter mode, the control circuit is configured to control closure of the first switch and the second switch with a constant on-time in the first phase. 
     
     
       6. The power supply circuit of  claim 1 , wherein in the two-level buck converter mode, the control circuit is configured to control closure of the first switch and the second switch according to a peak current in the first phase. 
     
     
       7. The power supply circuit of  claim 1 , wherein the control circuit is configured to control operation of the three-level buck converter circuit to exit the two-level buck converter mode based on an output current of the three-level buck converter circuit being higher than a threshold. 
     
     
       8. The power supply circuit of  claim 1 , further comprising an amplifier having a first input coupled to the output node, having a second input coupled to a voltage source, and having an output coupled to the control circuit and to the first input via a second capacitive element, wherein the control circuit is configured to control operation of the three-level buck converter circuit to exit the two-level buck converter mode based on an output voltage of the amplifier being above a threshold. 
     
     
       9. The power supply circuit of  claim 8 , wherein the threshold is based on at least one of an on-time of the first switch and the second switch, an inductance of the inductive element, an input voltage of an input node coupled to the first switch, or an output voltage of the output node. 
     
     
       10. The power supply circuit of  claim 1 , wherein:
 the first switch comprises a first transistor having a source coupled to the first node and having a drain coupled to an input node of the three-level buck converter circuit; 
 the second switch comprises a second transistor having a drain coupled to the first node and having a source coupled to the second node; 
 the third switch comprises a third transistor having a drain coupled to the second node and having a source coupled to the third node; and 
 the fourth switch comprises a fourth transistor having a drain coupled to the third node and having a source coupled to a reference potential node of the power supply circuit. 
 
     
     
       11. The power supply circuit of  claim 1 , further comprising a second capacitive element selectively coupled to the first node and selectively coupled to the third node. 
     
     
       12. The power supply circuit of  claim 11 , further comprising:
 a fifth switch coupled between the first node and a terminal of the second capacitive element; and 
 a sixth switch coupled between the third node and the terminal of the second capacitive element. 
 
     
     
       13. The power supply circuit of  claim 11 , wherein a capacitance of the second capacitive element is substantially equal to a capacitance of the first capacitive element. 
     
     
       14. The power supply circuit of  claim 12 , wherein in the two-level buck converter mode, the control circuit is further configured to: control closure of the sixth switch and control opening of the fifth switch, in the first phase of the two-level buck converter mode; and control opening of the sixth switch and control closure of the fifth switch, in the second phase of the two-level buck converter mode. 
     
     
       15. The power supply circuit of  claim 12 , wherein in the three-level buck converter mode, the control circuit is configured to:
 control closure of the fifth switch based on closure of the second switch and the fourth switch; and 
 control closure of the sixth switch based on closure of the first switch and the third switch. 
 
     
     
       16. The power supply circuit of  claim 12 , wherein in the two-level buck converter mode, the control circuit is configured to:
 control closure of the fifth switch based on closure of the third switch and the fourth switch; and 
 control closure of the sixth switch based on closure of the first switch and the second switch. 
 
     
     
       17. The power supply circuit of  claim 14 , wherein in the two-level buck converter mode:
 the second capacitive element is configured to be effectively connected in series with the first capacitive element in the first phase; and 
 the second capacitive element is configured to be effectively connected in parallel with the first capacitive element in the second phase. 
 
     
     
       18. The power supply circuit of  claim 14 , wherein an on-time interval of the first phase differs from an off-time interval of the second phase. 
     
     
       19. A method of regulating power, comprising: operating a three-level buck converter circuit in a three-level buck converter mode; and operating the three-level buck converter circuit in a two-level buck converter mode, wherein the three-level buck converter circuit comprises: a first switch; a second switch coupled to the first switch via a first node; a third switch coupled to the second switch via a second node; a fourth switch coupled to the third switch via a third node; a first capacitive element coupled between the first node and the third node; and an inductive element coupled between the second node and an output node; and operating the three-level buck converter circuit in the two-level buck converter mode comprises: in a first phase of the two-level buck converter mode, closing the first switch and the second switch and opening the third switch and the fourth switch; and in a second phase of the two-level buck converter mode, opening the first switch and the second switch and closing the third switch and the fourth switch. 
     
     
       20. The method of  claim 19 , further comprising detecting a light load condition for the three-level buck converter circuit while operating the three-level buck converter circuit in the three-level buck converter mode, wherein the three-level buck converter circuit is operated in the two-level buck converter mode based on the detection of the light load condition. 
     
     
       21. The method of  claim 19 , further comprising:
 sensing an output current of the three-level buck converter circuit while operating the three-level buck converter circuit in the three-level buck converter mode; and 
 determining the output current of the three-level buck converter circuit is lower than a first threshold, wherein the three-level buck converter circuit is operated in the two-level buck converter mode based on the determination. 
 
     
     
       22. The method of  claim 21 , further comprising:
 sensing the output current of the three-level buck converter circuit while operating the three-level buck converter circuit in the two-level buck converter mode; 
 determining the output current of the three-level buck converter circuit is higher than a second threshold, wherein the second threshold is higher than the first threshold; and 
 returning to operating the three-level buck converter circuit in the three-level buck converter mode based on the determination. 
 
     
     
       23. The method of  claim 19 , wherein the first switch and the second switch are closed with a constant on-time in the first phase. 
     
     
       24. The method of  claim 19 , wherein the first switch and the second switch are closed according to a peak current in the first phase. 
     
     
       25. The method of  claim 19 , further comprising:
 sensing an output current of the three-level buck converter circuit while operating the three-level buck converter circuit in the two-level buck converter mode; 
 determining the output current of the three-level buck converter circuit is higher than a threshold; and 
 returning to operating the three-level buck converter circuit in the three-level buck converter mode based on the determination. 
 
     
     
       26. The method of  claim 19 , further comprising:
 sensing an output voltage of an amplifier having a first input coupled to an output node of the three-level buck converter circuit, having a second input coupled to a voltage source, and having an output coupled to the first input via a capacitive element; 
 determining the output voltage of the amplifier is higher than a threshold while operating the three-level buck converter circuit in the two-level buck converter mode; and 
 returning to operating the three-level buck converter circuit in the three-level buck converter mode based on the determination. 
 
     
     
       27. The method of  claim 19 , wherein: the three-level buck converter circuit further comprises: a fifth switch coupled between the first node and a terminal of a second capacitive element; a sixth switch coupled between the third node and the terminal of the second capacitive element; and operating the three-level buck converter circuit in the two-level buck converter mode further comprises: in the first phase of the two-level buck converter mode, closing the sixth switch and opening the fifth switch; and in the second phase of the two-level buck converter mode, opening the sixth switch and closing the fifth switch. 
     
     
       28. The method of  claim 27 , wherein:
 a capacitance of the second capacitive element is substantially equal to a capacitance of the first capacitive element; and
 an on-time interval of the first phase differs from an off-time interval of the second phase.