Performing selective copyback in memory devices

Abstract

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising determining a data validity metric value with respect to a source set of memory cells of the memory device; determining whether the data validity metric value satisfies a first threshold criterion; responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; determining whether the data integrity metric value satisfies a second threshold criterion; and responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device.

What is claimed is: 
     
       1. A system comprising:
 a memory device; and 
 a processing device, operatively coupled to the memory device, to perform operations comprising:
 determining a data validity metric value with respect to a source set of memory cells of the memory device; 
 determining whether the data validity metric value satisfies a first threshold criterion; 
 responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; 
 determining whether the data integrity metric value satisfies a second threshold criterion; and 
 responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device. 
 
 
     
     
       2. The system of  claim 1 , wherein the data validity metric value reflects at least one of a program/erase cycles (PECs) value, a time after program (TAP) value, or a block read count value. 
     
     
       3. The system of  claim 1 , wherein determining the data validity metric value is performed in response to a media management operation. 
     
     
       4. The system of  claim 1 , wherein the processing device performs further operations comprising:
 responsive to determining that the data validity value fails to satisfy the first threshold criterion, copying the data from the source set of memory cells to the destination set of memory cells. 
 
     
     
       5. The system of  claim 1 , wherein the data integrity metric value reflects at least one of a bit error count (BEC) value or a raw bit error rate (RBER) value. 
     
     
       6. The system of  claim 1 , wherein the processing device performs further operations comprising:
 responsive to determining that the data integrity metric value satisfies the second threshold criterion, performing an error handling operation on the data to generate corrected data. 
 
     
     
       7. The system of  claim 6 , wherein the processing device to perform further operations comprising:
 copying the corrected data to the destination set of memory cells. 
 
     
     
       8. The system of  claim 1 , wherein the source set of memory cells comprises single-level cell (SLC) memory cells. 
     
     
       9. The system of  claim 1 , wherein the destination set of memory cells comprises higher-level cell (HLC) memory cells. 
     
     
       10. A method, comprising:
 determining, by a processor, a data validity metric value with respect to a source set of memory cells of the memory device; 
 determining whether the data validity metric value satisfies a first threshold criterion; 
 responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; 
 determining whether the data integrity metric value satisfies a second threshold criterion; 
 responsive to determining that the data integrity metric value satisfies the second threshold criterion, performing an error handling operation on data from the source set of memory cells to generate corrected data; and 
 copying the corrected data to a destination set of memory cells. 
 
     
     
       11. The method of  claim 10 , wherein the data validity metric value reflects at least one of a program/erase cycles (PECs) value, a time after program (TAP) value, or a block read count value. 
     
     
       12. The method of  claim 10 , wherein determining the data validity metric value is performed in response to a media management operation. 
     
     
       13. The method of  claim 10 , further comprising:
 responsive to determining that the data validity value fails to satisfy the first threshold criterion, copying the data from the source set of memory cells to the destination set of memory cells. 
 
     
     
       14. The method of  claim 10 , wherein the data integrity metric value reflects at least one of a bit error count (BEC) value or a raw bit error rate (RBER) value. 
     
     
       15. The method of  claim 10 , further comprising:
 responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy the data from the source set of memory cells to the destination set of memory cells of the memory device. 
 
     
     
       16. The method of  claim 10 , wherein the source set of memory cells comprises single-level cell (SLC) memory cells. 
     
     
       17. The method of  claim 10 , wherein the destination set of memory cells comprises higher-level cell (HLC) memory cells. 
     
     
       18. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device operatively coupled to a memory, performs operations comprising:
 determining a data validity metric value with respect to a source set of memory cells of the memory device; 
 determining whether the data validity metric value satisfies a first threshold criterion; 
 responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; 
 determining whether the data integrity metric value satisfies a second threshold criterion; and 
 responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device. 
 
     
     
       19. The non-transitory computer-readable storage medium of  claim 18 , wherein the processing device performs further operations comprising:
 responsive to determining that the data validity value fails to satisfy the first threshold criterion, copying the data from the source set of memory cells to the destination set of memory cells. 
 
     
     
       20. The non-transitory computer-readable storage medium of  claim 18 , wherein the processing device performs further operations comprising:
 responsive to determining that the data integrity metric value satisfies the second threshold criterion, performing an error handling operation on the data to generate corrected data.