Data storage for artificial intelligence-based applications

Abstract

A processor receives, from an input device, input data for processing. Upon determining that the input data corresponds to an artificial intelligence (AI) application, the processor generates an AI command for performing read or write operations for a memory device that is configured to store data for a plurality of applications including the AI application, the AI command characterized by an operational code and including information about one or more components of the AI application corresponding to the input data. The processor sends the AI command and the input data to a storage controller managing the memory device, wherein the read or write operations for the memory device are performed by the storage controller using the operational code and the information included in the AI command. The processor receives, from the storage controller, a result of the read or write operations performed on the memory device.

What is claimed is: 
     
       1. An apparatus comprising:
 one or more processors; 
 non-transitory media storing instructions that, when executed by the one or more processors, are configured to cause the one or more processors to perform operations comprising:
 receiving, from an input device, input data for processing; and 
 conditioned on determining that the input data corresponds to an artificial intelligence (AI) application:
 generating an AI command for performing one or more read or write operations for a memory device that is configured to (i) store data for AI applications processed by the one or more processors in a first storage partition of the memory device and (ii) store data for non-AI applications in a second storage partition of the memory device that is different from the first storage partition, 
 the AI command including information specifying (i) one or more neurons of an artificial neural network corresponding to the AI application, the one or more neurons associated with the input data, wherein the input data includes weights corresponding to one or more of input connections or output connections of each of the one or more neurons, and (ii) an operational code indicating operations to be performed on the one or more neurons, wherein the operational code corresponds to one of (a) an individual read or write of a particular neuron in the artificial neural network, (b) multiple individual reads or writes of a plurality of neurons in the artificial neural network, or (c) a batch read or write of a batch of neurons in the artificial neural network, 
 sending the AI command and the input data to a storage controller managing the memory device, wherein the one or more read or write operations for the memory device is performed by the storage controller using the operational code and the information included in the AI command, and 
 receiving, from the storage controller, a result of the one or more read or write operations performed on the memory device; and 
 
 
 the storage controller, wherein the storage controller is configured to perform operations comprising:
 upon receiving the AI command from the one or more processors, obtaining, from the information included in the AI command, a first set of weights of one or more of input connections or output connections of a first neuron of the one or more neurons, and a second set of weights of one or more of input connections or output connections of a second neuron of the one or more neurons; 
 determining that the first neuron is accessed more frequently than the second neuron, and that the second neuron is accessed at a same rate as other neurons of the one or more neurons; and 
 in response to the determination:
 storing the first set of weights in a first area of the memory device that is used for logging, and 
 storing the second set of weights in a second area of the memory device that is used for long-term storage different from logging. 
 
 
 
     
     
       2. The apparatus of  claim 1 , wherein the one or more processors to are configured to perform operations further comprising:
 receiving, from the input device, second input data for processing; and 
 conditioned on determining that the second input data corresponds to a non-AI application, accessing, by the one or more processors, one or more memory locations corresponding to the second input data in the memory device; and 
 performing one or more read or write operations on the accessed one or more memory locations. 
 
     
     
       3. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 storing in a particular page or block of the memory device, the first set of weights associated with the first neuron, wherein the particular page of the memory device is configured to store weights associated with the first neuron. 
 
     
     
       4. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 dividing the first set of weights into a first subset and a second subset, 
 storing the first subset in a same page or block in a first channel of the memory device, and 
 storing the second subset in a same page or block in a second channel of the memory device. 
 
     
     
       5. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 determining that a first weight of the first set of weights has a first importance value and a second weight of the first set of weights has a second importance value, wherein the second importance value is less than the first importance value; and 
 in response to the determination:
 storing the first weight in a single level cell (SLC) in a first page of the memory device, and 
 storing the second weight in one of a multi-level cell (MLC), a triple-level cell (TLC), or a quad-level cell (QLC) in a second page of the memory device. 
 
 
     
     
       6. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 determining that a first weight of the first set of weights has a first importance value and a second weight of the first set of weights has a second importance value, wherein the second importance value is less than the first importance value; and 
 in response to the determination:
 storing the first weight in a page or block of the memory device, and replicating the first weight in at least one additional page of the memory device, and 
 storing the second weight in a page or block of the memory device without replication. 
 
 
     
     
       7. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 determining that a first weight of the first set of weights has a particular importance value; 
 comparing the particular importance value to a threshold importance value; 
 conditioned on a result of the comparison indicating that the particular importance value is greater than or equal to the threshold importance value, performing a full error correction check as part of the one or more read or write operations for the first weight; and 
 conditioned on a result of the comparison indicating that the particular importance value is less than the threshold importance value, performing a partial error correction check as part of the one or more read or write operations for the first weight, wherein the partial error correction check is performed on one of the most significant bits corresponding to the first weight, or the least significant bits corresponding to the first weight. 
 
     
     
       8. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 determining a first portion and a second portion of each weight of the first set of weights, wherein the first portion and the second portion of each weight corresponds respectively to a first section and a second section of information bits corresponding to the weight, the first section and the second section characterized by corresponding relative importance values; 
 storing the first portions of the weights in the first set of weights in a first page of the memory device; and 
 storing the second portions of the weights in the first set of weights in a second page of the memory device, 
 wherein a first error check capability and a different second error check capability corresponds to the first page and the second page respectively. 
 
     
     
       9. The apparatus of  claim 1 , wherein the storage controller is configured to perform operations comprising:
 determining a first portion and a second portion of each weight of the first set of weights, wherein the first portion and the second portion of each weight corresponds respectively to a first section and a second section of information bits corresponding to the weight, the first section and the second section characterized by corresponding relative importance values; 
 storing the first portions of the weights in the first set of weights in a first block of the memory device; and 
 storing the second portions of the weights in the first set of weights in a second block of the memory device, 
 wherein a number of program/erase cycles corresponding to the first block is different from a number of program/erase cycles corresponding to second first block. 
 
     
     
       10. The apparatus of  claim 1 , wherein the memory device includes one of a non-volatile memory (NVM) storage, a universal flash storage (UFS), a peripheral component interconnect express (PCIe) storage, a phase-change memory (PCM), a resistive random-access memory (ReRAM), a magnetoresistive random-access memory (MRAM), a dynamic random-access memory, a magnetic disk, or an optical disk. 
     
     
       11. A system comprising:
 one or more processors, wherein each processor of the one or more processors is configured to perform first operations comprising: 
 receiving, from an input device, input data for processing; 
 conditioned on determining that the input data corresponds to an artificial intelligence (AI) application:
 generating an AI command for performing one or more read or write operations for a particular memory device of one or more memory devices that are each configured to store data for a plurality of applications processed by the one or more processors, the plurality of applications including the AI application, the AI command including information specifying one or more neurons of an artificial neural network corresponding to the AI application, the one or more neurons associated with the input data, the AI command characterized by an operational code indicating operations to be performed on the one or more neurons, 
 sending the AI command and the input data to a storage controller managing the particular memory device, wherein the one or more read or write operations for the particular memory device is performed by the storage controller using the operational code and the information included in the AI command, and 
 receiving, from the storage controller, a result of the one or more read or write operations performed on the particular memory device, 
 wherein the input data includes weights corresponding to one or more of input connections or output connections of each of the one or more neurons; and 
 
 one or more storage controllers, wherein each storage controller of the one or more storage controllers manages a different memory device of the one or more memory devices, wherein each storage controller of the one or more storage controllers is configured to perform second operations comprising:
 upon receiving an AI command and input data from a processor of the one or more processors, obtaining, from the information included in the AI command, a first set of weights corresponding to one or more of input connections or output connections of a first neuron of the one or more neurons and a second set of weights corresponding to one or more of input connections or output connections of a second neuron of the one or more neurons; 
 determining that the first neuron is accessed more frequently than the second neuron, and that the second neuron is accessed at a same rate as other neurons of the one or more neurons; and 
 in response to the determining, storing the first set of weights in a first section of the memory device used for storing frequently-accessed data, and storing the second set of weights in a different second section of the memory device used for long-term storage. 
 
 
     
     
       12. The system of  claim 11 , wherein the first operations further comprise:
 conditioned on determining that the input data corresponds to a non-AI application included in the plurality of applications:
 accessing one or more memory locations corresponding to the input data in a memory device of the one or more memory devices, and 
 performing one or more read or write operations on the accessed one or more memory locations. 
 
 
     
     
       13. The system of  claim 11 , the second operations comprise performing a memory access operation corresponding to the first set of weights associated with the first neuron, the memory access operation comprising:
 storing in a particular page or block of the corresponding memory device, the first set of weights associated with the first neuron, wherein the particular page of the corresponding memory device is configured to store weights associated with the first neuron. 
 
     
     
       14. The system of  claim 11 , the second operations comprise performing a memory access operation corresponding to the first set of weights associated with the first neuron, the memory access operation comprising:
 dividing the first set of weights into a first subset and a second subset, 
 storing the first subset in a same page or block in a first channel of the memory device, and 
 storing the second subset in a same page or block in a second channel of the memory device. 
 
     
     
       15. The system of  claim 11 , the second operations comprise performing a memory access operation corresponding to the first set of weights associated with the first neuron, the memory access operation comprising:
 determining that a first weight of the first set of weights has a first importance value and a second weight of the first set of weights has a second importance value, wherein the second importance value is less than the first importance value; and 
 in response to the determination:
 storing the first weight in a single level cell (SLC) in a first page of the memory device, and 
 storing the second weight in one of a multi-level cell (MLC), a triple-level cell (TLC), or a quad-level cell (QLC) in a second page of the memory device. 
 
 
     
     
       16. The system of  claim 11 , the second operations comprise performing a memory access operation corresponding to the first set of weights associated with the first neuron, the memory access operation comprising:
 determining that a first weight of the first set of weights has a first importance value and a second weight of the first set of weights has a second importance value, wherein the second importance value is less than the first importance value; and 
 in response to the determination:
 storing the first weight in a page or block of the memory device, and replicating the first weight in at least one additional page of the memory device, and 
 storing the second weight in a page or block of the memory device without replication. 
 
 
     
     
       17. The system of  claim 11 , wherein storing the first set of weights in a first section of the memory device comprises:
 storing the first set of weights in an area of the memory device that is used for logging. 
 
     
     
       18. The system of  claim 11 , wherein the second operations comprise performing a memory access operation corresponding to the first set of weights associated with the first neuron, the memory access operation comprising:
 determining that a first weight of the first set of weights has a particular importance value; 
 comparing the particular importance value to a threshold importance value; 
 conditioned on a result of the comparison indicating that the particular importance value is greater than or equal to the threshold importance value, performing a full error correction check as part of the one or more read or write operations for the first weight; and 
 conditioned on a result of the comparison indicating that the particular importance value is less than the threshold importance value, performing a partial error correction check as part of the one or more read or write operations for the first weight, wherein the partial error correction check is performed on one of the most significant bits corresponding to the first weight, or the least significant bits corresponding to the first weight. 
 
     
     
       19. The system of  claim 11 , wherein the second operations comprise performing a memory access operation corresponding to the first set of weights associated with the first neuron, the memory access operation comprising:
 determining a first portion and a second portion of each weight of the first set of weights, wherein the first portion and the second portion of each weight corresponds respectively to a first section and a second section of information bits corresponding to the weight, the first section and the second section characterized by corresponding relative importance values; 
 storing the first portions of the weights in the first set of weights in a first page of the memory device; and 
 storing the second portions of the weights in the first set of weights in a second page of the memory device, 
 wherein a first error check capability and a different second error check capability corresponds to the first page and the second page respectively. 
 
     
     
       20. The system of  claim 11 , wherein a memory device of the one or more memory devices includes one of a non-volatile memory (NVM) storage, a universal flash storage (UFS), a peripheral component interconnect express (PCIe) storage, a phase-change memory (PCM), a resistive random-access memory (ReRAM), a magnetoresistive random-access memory (MRAM), a dynamic random-access memory, a magnetic disk, or an optical disk. 
     
     
       21. A method comprising:
 receiving, at a processor from an input device, input data for processing; 
 conditioned on determining that the input data corresponds to an artificial intelligence (AI) application:
 generating, by the processor, an AI command for performing one or more read or write operations for a memory device that is configured to (i) store data for AI applications processed by the processor in a first storage partition of the memory device and (ii) store data for non-AI applications in a second storage partition of the memory device that is different from the first storage partition, the AI command including information specifying (i) one or more neurons of an artificial neural network corresponding to the AI application, the one or more neurons associated with the input data, and (ii) an operational code indicating operations to be performed on the one or more neurons, wherein the input data includes weights corresponding to one or more of input connections or output connections of each of the one or more neurons, 
 sending, by the processor, the AI command and the input data to a storage controller managing the memory device, wherein the one or more read or write operations for the memory device is performed by the storage controller using the operational code and the information included in the AI command, the one or more read or write operations comprising: 
 obtaining from the information included in the AI command, a first set of weights one or more of input connections or output connections of a first neuron of the one or more neurons and a second set of weights of one or more of input connections or output connections of a second neuron of the one or more neurons, 
 performing a memory access operation involving the first set of weights associated with the first neuron on the memory device, 
 upon determining that the first neuron is accessed more frequently than the second neuron, and that the second neuron is accessed at a same rate as other neurons of the one or more neurons, storing the first set of weights associated with the first neuron in a first area of the memory device that is used for logging, and storing the second set of weights in a second area of the memory device that is used for long-term storage different from logging, and 
 receiving, at the processor from the storage controller, a result of the one or more read or write operations performed on the memory device; and 
 
 conditioned on determining that the input data corresponds to a non-AI application:
 accessing, by the processor, one or more memory locations corresponding to the input data in the memory device, and 
 performing, by the processor, one or more read or write operations on the accessed one or more memory locations. 
 
 
     
     
       22. The method of  claim 21 , wherein performing the memory access operation comprises one of:
 storing in a particular page or block of the memory device, the first set of weights associated with the first neuron, wherein the particular page of the memory device is configured to store weights associated with the first neuron; or 
 dividing the first set of weights into a first subset and a second subset, 
 storing the first subset in a same page or block in a first channel of the memory device, and 
 storing the second subset in a same page or block in a second channel of the memory device. 
 
     
     
       23. The method of  claim 21 , wherein performing the memory access operation comprises:
 determining that a first weight of the first set of weights has a first importance value and a second weight of the first set of weights has a second importance value, wherein the second importance value is less than the first importance value; and 
 in response to the determination:
 storing the first weight in a single level cell (SLC) in a first page of the memory device, and 
 storing the second weight in one of a multi-level cell (MLC), a triple-level cell (TLC), or a quad-level cell (QLC) in a second page of the memory device. 
 
 
     
     
       24. The method of  claim 21 , wherein performing the memory access operation comprises:
 determining that a first weight of the first set of weights has a first importance value and a second weight of the first set of weights has a second importance value, wherein the second importance value is less than the first importance value; and 
 in response to the determination:
 storing the first weight in a page or block of the memory device, and replicating the first weight in at least one additional page of the memory device, and 
 storing the second weight in a page or block of the memory device without replication. 
 
 
     
     
       25. The method of  claim 21 , wherein performing the memory access operation comprises:
 determining that a first weight of the first set of weights has a particular importance value; 
 comparing the particular importance value to a threshold importance value; 
 conditioned on a result of the comparison indicating that the particular importance value is greater than or equal to the threshold importance value, performing a full error correction check as part of the one or more read or write operations for the first weight; and 
 conditioned on a result of the comparison indicating that the particular importance value is less than the threshold importance value, performing a partial error correction check as part of the one or more read or write operations for the first weight, wherein the partial error correction check is performed on one of the most significant bits corresponding to the first weight, or the least significant bits corresponding to the first weight. 
 
     
     
       26. The method of  claim 21 , wherein performing the memory access operation comprises:
 determining a first portion and a second portion of each weight of the first set of weights, wherein the first portion and the second portion of each weight corresponds respectively to a first section and a second section of information bits corresponding to the weight, the first section and the second section characterized by corresponding relative importance values; 
 storing the first portions of the weights in the first set of weights in a first page of the memory device; and 
 storing the second portions of the weights in the first set of weights in a second page of the memory device, 
 wherein a first error check capability and a different second error check capability corresponds to the first page and the second page respectively. 
 
     
     
       27. The method of  claim 21 , wherein performing the memory access operation comprises:
 determining a first portion and a second portion of each weight of the first set of weights, wherein the first portion and the second portion of each weight corresponds respectively to a first section and a second section of information bits corresponding to the weight, the first section and the second section characterized by corresponding relative importance values; 
 storing the first portions of the weights in the first set of weights in a first block of the memory device; and 
 storing the second portions of the weights in the first set of weights in a second block of the memory device, 
 wherein a number of program/erase cycles corresponding to the first block is different from a number of program/erase cycles corresponding to second first block.