Quantum error mitigation based on scaled gates

Abstract

Techniques regarding quantum error mitigation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise an error mitigation component that can add a set of scaled quantum gates to a quantum circuit for error mitigation. The set of scaled quantum gates can comprise a quantum gate and an inverse of the quantum gate. Also, the set of scaled quantum gates can have a rotation angle based on a pulse schedule to achieve a target stretch factor.

What is claimed is: 
     
       1. A system, comprising:
 a memory that stores computer executable components; and 
 a processor, operably coupled to the memory, and that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
 an error mitigation component that:
 identifies a multi-qubit quantum gate in a quantum circuit, and 
 adds a set of scaled quantum gates at a position after the multi-qubit quantum gate in the quantum circuit for error mitigation, wherein the set of scaled quantum gates comprises a first quantum gate and a second quantum gate that is an inverse of the first quantum gate, and wherein the set of scaled quantum gates has a rotation angle based on a pulse schedule to achieve a target stretch factor. 
 
 
 
     
     
       2. The system of  claim 1 , wherein the rotation angle of the set of scaled quantum gates controls an amount of noise experienced by the quantum circuit. 
     
     
       3. The system of  claim 1 , wherein the multi-qubit quantum gate comprises two controlled-NOT (CNOT) gates, and the position is adjacent to the multi-qubit quantum gate in the quantum circuit. 
     
     
       4. The system of  claim 1 , wherein the set of scaled quantum gates comprises an R ZX  gate implemented by: a single cross-resonance pulse, a cross-resonance pulse with a rotary term, an echoed cross-resonance pulse with the rotary term, or a direct CX gate. 
     
     
       5. The system of  claim 1 , further comprising:
 a calibration component that performs a calibration of the multi-qubit quantum gate and determines a pulse implementation of the multi-qubit quantum gate. 
 
     
     
       6. The system of  claim 5 , further comprising:
 a scaling component that generates the pulse schedule for the set of scaled quantum gates based on the pulse implementation of the multi-qubit quantum gate and the target stretch factor, wherein the pulse schedule scales the rotation angle of quantum gates of the set of scaled quantum gates. 
 
     
     
       7. The system of  claim 1 , further comprising:
 an execution component that executes the quantum circuit with the set of scaled quantum gates. 
 
     
     
       8. The system of  claim 7 , further comprising:
 an extrapolation component that extrapolates results achieved by the execution component to mitigate noise of the quantum circuit. 
 
     
     
       9. A computer-implemented method, comprising:
 identifies, by a system operatively coupled to a processor, a multi-qubit quantum gate in a quantum circuit; and 
 adding, by the system, a set of scaled quantum gates at a position after the multi-qubit quantum gate in the quantum circuit for error mitigation, wherein the set of scaled quantum gates comprises a first quantum gate and a second quantum gate that is an inverse of the first quantum gate, and wherein the set of scaled quantum gates has a rotation angle based on a pulse schedule to achieve a target stretch factor. 
 
     
     
       10. The computer-implemented method of  claim 9 , wherein the rotation angle of the set of scaled quantum gates controls an amount of noise experienced by the quantum circuit. 
     
     
       11. The computer-implemented method of  claim 9 , wherein the multi-qubit quantum gate comprises two controlled-NOT (CNOT) gates, and the position is adjacent to the multi-qubit quantum gate in the quantum circuit. 
     
     
       12. The computer-implemented method of  claim 9 , wherein the set of scaled quantum gates comprises an R ZX  gate implemented by: a single cross-resonance pulse, a cross-resonance pulse with a rotary term, an echoed cross-resonance pulse with the rotary term, or a direct CX gate. 
     
     
       13. The computer-implemented method of  claim 9 , further comprising:
 extracting, by the system, a calibration of the multi-qubit quantum gate to determine a pulse implementation of the multi-qubit quantum gate. 
 
     
     
       14. The computer-implemented method of  claim 13 , further comprising:
 generating, by the system, the pulse schedule for the set of scaled quantum gates based on the pulse implementation of the multi-qubit quantum gate and the target stretch factor, wherein the pulse schedule scales the rotation angle of the set of quantum gates to define of the set of scaled quantum gates. 
 
     
     
       15. The computer-implemented method of  claim 9 , further comprising:
 executing, by the system, the quantum circuit with the set of scaled quantum gates; and 
 extrapolating, by the system, results from the executing to mitigate noise of the quantum circuit. 
 
     
     
       16. A computer program product for mitigating error of a quantum circuit, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to:
 identify a multi-qubit quantum gate in the quantum circuit; and 
 add a set of scaled quantum gates at a position after the multi-qubit quantum gate in the quantum circuit, wherein the set of scaled quantum gates comprises a first quantum gate and a second quantum gate that is an inverse of the first quantum gate, and wherein the set of scaled quantum gates has a rotation angle based on a pulse schedule to achieve a target stretch factor. 
 
     
     
       17. The computer program product of  claim 16 , wherein the rotation angle of the set of scaled quantum gates controls an amount of noise experienced by the quantum circuit. 
     
     
       18. The computer program product of  claim 16 , wherein the multi-qubit quantum gate comprises two controlled-NOT (CNOT) gates, and the position is adjacent to the multi-qubit quantum gate in the quantum circuit. 
     
     
       19. The computer program product of  claim 16 , wherein the program instructions further cause the processor to:
 extract a calibration of the multi-qubit quantum gate to determine a pulse implementation of the multi-qubit quantum gate; and 
 generate the pulse schedule for the set of scaled quantum gates based on the pulse implementation of the multi-qubit quantum gate and the target stretch factor, wherein the pulse schedule scales the rotation angle of quantum gates of the set of scaled quantum gates. 
 
     
     
       20. The computer program product of  claim 16 , wherein the program instructions further cause the processor to:
 execute the quantum circuit with the set of scaled quantum gates; and 
 extrapolate results achieved by execution of the quantum circuit to mitigate noise of the quantum circuit.