Radio frequency switch control circuitry

Abstract

Apparatus and methods for radio frequency (RF) switch control are provided. In certain embodiments, a level shifter for an RF switch includes a first level-shifting n-type transistor, a first cascode n-type transistor in series with the first level-shifting n-type transistor between a negative charge pump voltage and a first output that provides a first switch control signal, a first level-shifting p-type transistor, a first cascode p-type transistor in series with the first level-shifting p-type transistor between a positive charge pump voltage and the first output, and a second cascode p-type transistor between a regulated voltage and a gate of the first level-shifting n-type transistor and controlled by a first switch enable signal.

What is claimed is: 
     
       1. A mobile device comprising:
 a power management system including a positive charge pump configured to generate a positive charge pump voltage, a negative charge pump configured to generate a negative charge pump voltage, and a voltage regulator configured to generate a regulated voltage; and 
 a front end system including a radio frequency switch controlled by a first switch control signal, and a level shifter operable to level shift a first switch enable signal to generate the first switch control signal at a first output, the level shifter including a first level-shifting n-type transistor and a first cascode n-type transistor in series between the negative charge pump voltage and the first output, a first level-shifting p-type transistor and a first cascode p-type transistor in series between the positive charge pump voltage and the first output, and a second cascode p-type transistor between the regulated voltage and a gate of the first level-shifting n-type transistor and controlled by the first switch enable signal. 
 
     
     
       2. The mobile device of  claim 1  wherein the level shifter is further operable to level shift a second switch enable signal to generate a second switch control signal at a second output, the second switch enable signal of complementary polarity to the first switch enable signal. 
     
     
       3. The mobile device of  claim 2  wherein the level shifter further includes a second level shifting n-type transistor in series with the second cascode p-type transistor between the regulated voltage and the negative charge pump voltage, a third cascode p-type transistor, and a third level shifting n-type transistor in series with the third cascode p-type transistor between the regulated voltage and the negative charge pump voltage. 
     
     
       4. The mobile device of  claim 3  wherein the level shifter further includes a fourth level shifting n-type transistor and a second cascode n-type transistor in series between the second output and the negative charge pump voltage, and a second level shifting p-type transistor and a fourth cascode p-type transistor in series between the positive charge pump voltage and the second output. 
     
     
       5. The mobile device of  claim 1  wherein the front end system further includes a power amplifier configured to provide a radio frequency signal to the radio frequency switch. 
     
     
       6. The mobile device of  claim 1  wherein the power management system further includes a charge pump clock generator including a multi-phase oscillator configured to generate a plurality of oscillator clock signals, and a clock phase logic and combining circuit configured to process the plurality of oscillator clock signals to generate a first clock signal of higher frequency than an oscillation frequency of the multi-phase oscillator, the first clock signal operable to control at least one of the positive charge pump or the negative charge pump. 
     
     
       7. The mobile device of  claim 6  wherein the clock phase logic and combining circuit is further configured to generate a second clock signal offset in phase from the first clock signal, the first clock signal operable to control the positive charge pump and the second clock signal operable to control the negative charge pump. 
     
     
       8. A radio frequency switch system comprising:
 a radio frequency switch configured to receive a radio frequency signal and controlled by a first switch control signal; 
 a positive charge pump configured to generate a positive charge pump voltage; 
 a negative charge pump configured to generate a negative charge pump voltage; 
 a voltage regulator configured to generate a regulated voltage; and 
 a level shifter operable to level shift a first switch enable signal to generate the first switch control signal at a first output, the level shifter including a first level-shifting n-type transistor and a first cascode n-type transistor in series between the negative charge pump voltage and the first output, a first level-shifting p-type transistor and a first cascode p-type transistor in series between the positive charge pump voltage and the first output, and a second cascode p-type transistor between the regulated voltage and a gate of the first level-shifting n-type transistor and controlled by the first switch enable signal. 
 
     
     
       9. The radio frequency switch system of  claim 8  wherein the level shifter is further operable to level shift a second switch enable signal to generate a second switch control signal at a second output, the second switch enable signal of complementary polarity to the first switch enable signal. 
     
     
       10. The radio frequency switch system of  claim 9  wherein the level shifter further includes a second level shifting n-type transistor in series with the second cascode p-type transistor between the regulated voltage and the negative charge pump voltage, a third cascode p-type transistor, and a third level shifting n-type transistor in series with the third cascode p-type transistor between the regulated voltage and the negative charge pump voltage. 
     
     
       11. The radio frequency switch system of  claim 10  wherein the level shifter further includes a fourth level shifting n-type transistor and a second cascode n-type transistor in series between the negative charge pump voltage and the second output, and a second level shifting p-type transistor and a fourth cascode p-type transistor in series between the positive charge pump voltage and the second output. 
     
     
       12. The radio frequency switch system of  claim 11  further comprising a first enable level shifting circuit configured to level shift the first switch enable signal to generate a first level shifted switch enable signal that controls a gate of the second level shifting p-type transistor, and a second enable level shifting circuit configured to level shift the second switch enable signal to generate a second level shifted switch enable signal that controls a gate of the first level shifting p-type transistor. 
     
     
       13. The radio frequency switch system of  claim 11  wherein a gate of the first cascode p-type transistor and a gate of the fourth cascode p-type transistor are connected to a ground voltage. 
     
     
       14. The radio frequency switch system of  claim 11  wherein a gate of the second level shifting n-type transistor and a gate of the fourth level shifting n-type transistor are connected to a drain of the third level shifting n-type transistor, and the gate of the first level shifting n-type transistor and a gate of the third level shifting n-type transistor are connected to a drain of the second level shifting n-type transistor. 
     
     
       15. The radio frequency switch system of  claim 9  wherein the radio frequency switch includes a series transistor switch electrically connected between an input terminal and an output terminal and controlled by the first switch control signal, and a shunt transistor switch electrically connected between the input terminal and a ground voltage and controlled by the second switch control signal. 
     
     
       16. The radio frequency switch system of  claim 8  further comprising a charge pump clock generator including a multi-phase oscillator configured to generate a plurality of oscillator clock signals, and a clock phase logic and combining circuit configured to process the plurality of oscillator clock signals to generate a first clock signal of higher frequency than an oscillation frequency of the multi-phase oscillator, the first clock signal operable to control at least one of the positive charge pump or the negative charge pump. 
     
     
       17. The radio frequency switch system of  claim 16  wherein the clock phase logic and combining circuit is further configured to generate a second clock signal offset in phase from the first clock signal, the first clock signal operable to control the positive charge pump and the second clock signal operable to control the negative charge pump. 
     
     
       18. The radio frequency switch system of  claim 8  wherein the voltage regulator is a low dropout regulator. 
     
     
       19. A level shifter for a radio frequency switch, the level shifter comprising:
 a first level-shifting n-type transistor; 
 a first cascode n-type transistor in series with the first level-shifting n-type transistor between a negative charge pump voltage and a first output that provides a first switch control signal; 
 a first level-shifting p-type transistor; 
 a first cascode p-type transistor in series with the first level-shifting p-type transistor between a positive charge pump voltage and the first output; and 
 a second cascode p-type transistor between a regulated voltage and a gate of the first level-shifting n-type transistor and controlled by a first switch enable signal. 
 
     
     
       20. The level shifter of  claim 19  further comprising a second level shifting n-type transistor in series with the second cascode p-type transistor between the regulated voltage and the negative charge pump voltage, a third cascode p-type transistor, and a third level shifting n-type transistor in series with the third cascode p-type transistor between the regulated voltage and the negative charge pump voltage.