US11961850B2ActiveUtilityA1
Display substrate, manufacturing method thereof, and display device
Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO LTDPriority: Aug 23, 2019Filed: Jun 26, 2023Granted: Apr 16, 2024
Est. expiryAug 23, 2039(~13.1 yrs left)· nominal 20-yr term from priority
H10D 86/451H10D 86/423H10D 86/0221H10D 86/481H10D 30/6723H10D 86/60H10D 1/692H10D 86/021H01L 27/1255H01L 27/1225H01L 27/1248H01L 27/127
71
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Cited by
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References
20
Claims
Abstract
Provided is a display substrate. The display substrate includes a base substrate, and a pixel unit disposed on the base substrate. The pixel unit includes a storage capacitor, the storage capacitor includes a first plate and a second plate facing each other, and a plate of the storage capacitor is a transparent plate. The pixel unit further includes an active layer and a source/drain pattern, which are disposed in two different layers.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A display substrate, comprising:
a base substrate; and
a pixel unit disposed on the base substrate, wherein the pixel unit comprises a storage capacitor, the storage capacitor comprises a first plate and a second plate facing each other, and a plate of the storage capacitor is a transparent plate;
wherein the pixel unit further comprises a light shielding layer, an active layer and a source/drain pattern, the light shielding layer is between the base substrate and the active layer, an orthographic projection of the active layer on the base substrate is within an orthographic projection of the light shielding layer on the base substrate;
the light shielding layer comprises a transparent conductive thin film and a light-shielding conductive thin film which are superimposed, the transparent conductive thin film in the light shielding layer is closer to a side of the base substrate and is in direct contact with the base substrate, and an insulating layer is provided between the light shielding layer and the source/drain pattern; and
the first plate comprises a first sub-plate, the first sub-plate comprises a transparent conductive thin film, the transparent conductive thin film of the first sub-plate is in direct contact with the insulating layer.
2. The display substrate according to claim 1 , wherein the transparent conductive thin film of the first sub-plate and the transparent conductive thin film of the light shielding layer are disposed in a same layer, and a thickness of the light shielding layer is bigger than that of the first sub-plate in a direction vertical to the base substrate.
3. The display substrate according to claim 1 , wherein the display substrate further comprises a passivating layer, the passivating layer is at a side of the source/drain pattern farther away from the base substrate, the source/drain pattern comprises a transparent conductive thin film and a light-shielding conductive thin film which are superimposed, and the transparent conductive thin film superimposed in the source/drain pattern is closer to the side of the base substrate and is in direct contact with a side of the insulating layer farther away from the base substrate.
4. The display substrate according to claim 3 , wherein the first plate comprises a second sub-plate, the second sub-plate and the transparent conductive thin film superimposed in the source/drain pattern are disposed in a same layer; and
the second sub-plate comprises a transparent conductive thin film, the transparent conductive thin film of the second sub-plate is in direct contact with the passivating layer, and a thickness of the source/drain pattern is bigger than that of the second sub-plate in a direction vertical to the base substrate.
5. The display substrate according to claim 3 , wherein the pixel unit further comprises a pixel electrode on a side of the passivating layer farther away from the base substrate, the passivating layer comprises a pixel via hole, the pixel electrode is electrically connected to the source/drain pattern by the pixel via hole, and an orthographic projection of the pixel via hole on the base substrate overlaps with an orthographic projection of the source/drain pattern on the base substrate.
6. The display substrate according to claim 3 , wherein the insulating layer comprises a connection hole, the second sub-plate is electrically connected to the first sub-plate by the connection hole, and there is a gap between the second sub-plate and the source/drain pattern.
7. The display substrate according to claim 6 , wherein an orthographic projection of the second sub-plate on the base substrate is within an orthographic projection of the first sub-plate on the base substrate.
8. The display substrate according to claim 6 , wherein the pixel unit further comprises a buffer layer, a gate insulating layer and a gate, the buffer layer is disposed between the light shielding layer and the active layer, and the active layer, the gate insulating layer, the gate, an interlayer dielectric layer and the source/drain pattern constitute a thin film transistor; and
the insulating layer between the light shielding layer and the source/drain pattern comprises the buffer layer and the interlayer dielectric layer.
9. The display substrate according to claim 8 , wherein the connection hole runs through the interlayer dielectric layer.
10. The display substrate according to claim 9 , wherein the first sub-plate is in direct contact with the buffer layer, and the second sub-plate is in direct contact with a side of the interlayer dielectric layer farther away from the base substrate.
11. The display substrate according to claim 8 , wherein the gate has a single-layer structure or a multi-layer structure.
12. The display substrate according to claim 8 , wherein the active layer, the gate insulating layer, the gate, the interlayer dielectric layer and the source/drain pattern are disposed in a direction away from the base substrate;
the source/drain pattern comprises a source and a drain;
an orthographic projection of the gate insulating layer on the base substrate is coincident with an orthographic projection of the gate on the base substrate;
the interlayer dielectric layer comprises a source via hole and a drain via hole, the source is in contact with the active layer by the source via hole, and the drain is in contact with the active layer by the drain via hole; and
the pixel electrode is electrically connected to the drain by the pixel via hole.
13. The display substrate according to claim 1 , wherein an orthographic projection of the transparent conductive thin film in the light shielding layer on the base substrate covers an orthographic projection of the light-shielding conductive thin film in the light shielding layer on the base substrate.
14. The display substrate according to claim 1 , wherein the second plate and the active layer are disposed at a same layer.
15. The display substrate according to claim 1 , wherein display substrate comprises a passivating layer, the passivating layer is at a side of the source/drain pattern farther away from the base substrate, and the source/drain pattern is a transparent pattern.
16. The display substrate according to claim 1 , wherein a material of the first plate comprises metal oxide, and a material of the second plate comprises a conductive semiconductor material.
17. The display substrate according to claim 1 , wherein the light-shielding conductive thin film comprises a first light-shielding thin film and a second light-shielding thin film which are superimposed.
18. The display substrate according to claim 17 , wherein a material of the first light-shielding thin film differs from that of the second light-shielding thin film, or is as same as that of the second light-shielding thin film.
19. The display substrate according to claim 18 , wherein in a case that the material of the first light-shielding thin film differs from that of the second light-shielding thin film, the material of the first light-shielding thin film comprises MoNb alloy and the material of the second light-shielding thin film comprises Cu.
20. A display device, comprising the display substrate according to claim 1 .Cited by (0)
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