Gate driving device

Abstract

A gate driving device includes an operational amplifier, two impedances, a multiplexer, and an UVLO circuit. The operational amplifier has an output coupled to the gate of the SiC MOSFET, a positive power terminal coupled to a positive power rail, and a negative power terminal coupled to a negative power rail. The impedances are coupled in series and coupled between the output of the amplifier and a low-voltage terminal. The UVLO circuit is coupled to the multiplexer and the positive power rail and coupled to the positive power voltage of the positive power rail, a driving voltage, and an UVLO voltage. The UVLO circuit controls the multiplexer to transmit an off voltage or an on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET.

What is claimed is: 
     
       1. A gate driving device coupled to a gate of a SiC metal-oxide-semiconductor field effect transistor (MOSFET), the SiC MOSFET coupled between a high-voltage terminal and a low-voltage terminal, and the gate driving device comprising:
 an operational amplifier having an output coupled to the gate of the SiC MOSFET, wherein a positive power terminal and a negative power terminal of the operational amplifier are respectively coupled to a positive power rail and a negative power rail, and the positive power rail and the negative power rail respectively have a positive power voltage and a negative power voltage; 
 two impedances coupled in series and coupled between the low-voltage terminal and each of the output of the operational amplifier and the gate of the SiC MOSFET, wherein a node between the impedances is coupled to a negative input of the operational amplifier; 
 a multiplexer coupled to a positive input of the operational amplifier and coupled to an off voltage and an on voltage; and 
 an under voltage lock out (UVLO) circuit coupled to the multiplexer and the positive power rail and configured to input the positive power voltage, a driving voltage, and an under voltage lock out (UVLO) voltage, wherein the UVLO circuit is configured to control the multiplexer to transmit the off voltage or the on voltage to the positive input of the operational amplifier based on the positive power voltage, the driving voltage, and the UVLO voltage, thereby turning on or off the SiC MOSFET. 
 
     
     
       2. The gate driving device according to  claim 1 , wherein the UVLO circuit comprises:
 a first NPN bipolar junction transistor (BJT) having a base coupled to the UVLO voltage, a collector coupled to the positive power rail, and an emitter coupled to the low-voltage terminal through a second resistor; 
 a second NPN bipolar junction transistor (BJT) having an emitter coupled to a node between the emitter of the first NPN BJT and the second resistor and a collector coupled to the positive power rail through a third resistor, wherein a base of the second NPN BJT is coupled to the low-voltage terminal through a fourth resistor and coupled to the driving voltage through a fifth resistor; and 
 a PNP bipolar junction transistor (BJT) having a base coupled to a node between the third resistor and the collector of the second NPN BJT, an emitter coupled to the positive power rail, and a collector coupled to the multiplexer and coupled to the low-voltage terminal through a sixth resistor. 
 
     
     
       3. The gate driving device according to  claim 2 , wherein the multiplexer transmits the on voltage to the positive input of the operational amplifier to turn on the SiC MOSFET when the driving voltage is greater than UVLO voltage and the positive power voltage turns on the PNP BJT, and the multiplexer transmits the off voltage to the positive input of the operational amplifier to turn off the SiC MOSFET when the positive power voltage brings the PNP BJT to operate in its cut-off region. 
     
     
       4. The gate driving device according to  claim 1 , further comprising:
 a resistor and a regulator device coupled in series and coupled between the positive power rail and the negative power rail, wherein a node between the resistor and the regulator device is coupled to the low-voltage terminal; and 
 a direct-current (DC) voltage source coupled to the positive power rail and the negative power rail and configured to provide the positive power voltage and the negative power voltage through the resistor and the regulator device. 
 
     
     
       5. The gate driving device according to  claim 1 , further comprising:
 a resistor and a regulator device coupled in series and coupled between the positive power rail and the negative power rail, wherein a node between the resistor and the regulator device is coupled to the low-voltage terminal; 
 a transformer having a primary side coupled to a first capacitor, wherein a secondary side of the transformer has a first end and a second end, the first end of the secondary side is coupled to the UVLO circuit, and the second end of the secondary side is coupled to the low-voltage terminal; 
 a pulsating alternating-current (AC) voltage source coupled to the primary side through the first capacitor; 
 a diode having an anode coupled to the first end of the secondary side and a cathode coupled to the positive power rail; and 
 a second capacitor coupled between the positive power rail and the negative power rail; 
 wherein the AC voltage source is configured to provide the driving voltage, the positive power voltage, and the negative power voltage through the first capacitor, the diode, the resistor, and the regulator device. 
 
     
     
       6. The gate driving device according to  claim 1 , further comprising a totem pole circuit coupled to the gate of the SiC MOSFET and the output of the operational amplifier. 
     
     
       7. The gate driving device according to  claim 1 , wherein the low-voltage terminal is a grounding terminal. 
     
     
       8. The gate driving device according to  claim 1 , wherein the SiC MOSFET is an N-channel MOSFET or a P-channel MOSFET.