Multiple virtual NUMA domains within a single NUMA domain via operating system interface tables

Abstract

Systems, apparatuses and methods may provide for technology that identifies a NUMA node, defines a first virtual proximity domain within the NUMA node, and defines a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more OS interface tables.

We claim: 
     
       1. A computing system comprising:
 a socket; 
 a processor coupled to the socket; and 
 a memory coupled to the processor, the memory including a set of executable program instructions, which when executed by the processor, cause the processor to:
 identify a non-uniform memory access (NUMA) node, 
 define a first virtual proximity domain within the NUMA node, and 
 define a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more operating system (OS) interface tables, 
 wherein the socket is to have one or more of:
 (a) an initial interleave configuration, wherein to define the first virtual proximity domain and the second virtual proximity domain, the instructions, when executed, cause the processor to maintain the initial interleave configuration, or 
 (b) an initial cache grouping, wherein to define the first virtual proximity domain and the second virtual proximity domain, the instructions, when executed, cause the processor to maintain the initial cache grouping. 
 
 
 
     
     
       2. The computing system of  claim 1 , wherein the one or more OS interface tables are selected from a group consisting of a static resource affinity table or a system locality information table. 
     
     
       3. The computing system of  claim 1 , wherein the NUMA node is to be dedicated to the socket. 
     
     
       4. The computing system of  claim 3 , wherein the instructions, when executed, further cause the processor to:
 identify a second NUMA node, wherein the second NUMA node is dedicated to the physical socket; and 
 define two or more virtual proximity domains within the second NUMA node, wherein the two or more virtual proximity domains are defined via the one or more OS interface tables. 
 
     
     
       5. The computing system of  claim 1 , wherein the instructions, when executed, further cause the processor to:
 create a first group of processors; 
 associate the first group of processors with the first virtual proximity domain; 
 create a second group of processors; and 
 associate the second group of processors with the second virtual proximity domain. 
 
     
     
       6. The computing system of  claim 1 , wherein the instructions, when executed, further cause the processor to define more than two virtual proximity domains within the NUMA node via the one or more OS interface tables. 
     
     
       7. A semiconductor apparatus comprising:
 one or more substrates; and 
 logic coupled to the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable logic or fixed-functionality hardware logic, the logic coupled to the one or more substrate to: 
 identify a non-uniform memory access (NUMA) node; 
 define a first virtual proximity domain within the NUMA node; and 
 define a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more operating system (OS) interface tables; 
 wherein the NUMA node is to be dedicated to a physical socket, wherein the physical socket is to have one or more of:
 (a) an initial interleave configuration, wherein to define the first virtual proximity domain and the second virtual proximity domain, the logic coupled to the one or more substrates is to maintain the initial interleave configuration, or 
 (b) an initial cache grouping, wherein to define the first virtual proximity domain and the second virtual proximity domain, the logic coupled to the one or more substrates is to maintain the initial cache grouping. 
 
 
     
     
       8. The apparatus of  claim 7 , wherein the one or more OS interface tables are selected from a group consisting of a static resource affinity table or a system locality information table. 
     
     
       9. The apparatus of  claim 7 , wherein the logic coupled to the one or more substrates is to:
 create a first group of processors; 
 associate the first group of processors with the first virtual proximity domain; 
 create a second group of processors; and 
 associate the second group of processors with the second virtual proximity domain. 
 
     
     
       10. The apparatus of  claim 7 , wherein the logic coupled to the one or more substrates includes transistor channel regions that are positioned within the one or more substrates. 
     
     
       11. The apparatus of  claim 7 , wherein the logic coupled to the one or more substrates is to:
 identify a second NUMA node, wherein the second NUMA node is dedicated to the physical socket; and 
 define two or more virtual proximity domains within the second NUMA node, wherein the two or more virtual proximity domains are defined via the one or more OS interface tables. 
 
     
     
       12. The apparatus of  claim 7 , wherein the logic coupled to the one or more substrates is to define more than two virtual proximity domains within the NUMA node via the one or more OS interface tables. 
     
     
       13. At least one non-transitory computer readable storage medium comprising a set of executable program instructions, which when executed by a computing system, cause the computing system to:
 identify a non-uniform memory access (NUMA) node; 
 define a first virtual proximity domain within the NUMA node; and 
 define a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more operating system (OS) interface tables; 
 wherein the NUMA node is to be dedicated to a physical socket, wherein the physical socket is to have one or more of:
 (a) an initial interleave configuration, wherein to define the first virtual proximity domain and the second virtual proximity domain, the instructions, when executed, cause the computing system to maintain the initial interleave configuration, or 
 (b) an initial cache grouping, wherein to define the first virtual proximity domain and the second virtual proximity domain, the instructions, when executed, cause the computing system to maintain the initial cache grouping. 
 
 
     
     
       14. The at least one non-transitory computer readable storage medium of  claim 13 , wherein the one or more OS interface tables are selected from a group consisting of a static resource affinity table or a system locality information table. 
     
     
       15. The at least one non-transitory computer readable storage medium of  claim 13 , wherein the instructions, when executed, further cause the computing system to:
 identify a second NUMA node, wherein the second NUMA node is dedicated to the physical socket; and 
 define two or more virtual proximity domains within the second NUMA node, wherein the two or more virtual proximity domains are defined via the one or more OS interface tables. 
 
     
     
       16. The at least one non-transitory computer readable storage medium of  claim 13 , wherein the instructions, when executed, further cause the computing system to:
 create a first group of processors; 
 associate the first group of processors with the first virtual proximity domain; 
 create a second group of processors; and 
 associate the second group of processors with the second virtual proximity domain. 
 
     
     
       17. The at least one non-transitory computer readable storage medium of  claim 13 , wherein the instructions, when executed, further cause the computing system to define more than two virtual proximity domains within the NUMA node via the one or more OS interface tables. 
     
     
       18. A method comprising:
 identifying a non-uniform memory access (NUMA) node; 
 defining a first virtual proximity domain within the NUMA node; and 
 defining a second virtual proximity domain within the NUMA node, wherein the first virtual proximity domain and the second virtual proximity domain are defined via one or more operating system (OS) interface tables, 
 wherein the NUMA node is dedicated to a physical socket, wherein the physical socket has an initial interleave configuration, wherein defining the first virtual proximity domain and the second virtual proximity domain includes maintaining the initial interleave configuration, wherein the physical socket has an initial cache grouping, and wherein defining the first virtual proximity domain and the second virtual proximity domain includes maintaining the initial cache grouping. 
 
     
     
       19. The method of  claim 18 , wherein the one or more OS interface tables are selected from a group consisting of a static resource affinity table or a system locality information table. 
     
     
       20. The method of  claim 18 , further including:
 creating a first group of processors; 
 associating the first group of processors with the first virtual proximity domain; 
 creating a second group of processors; and 
 associating the second group of processors with the second virtual proximity domain. 
 
     
     
       21. The method of  claim 18 , further including:
 identifying a second NUMA node, wherein the second NUMA node is dedicated to the physical socket; and 
 defining two or more virtual proximity domains within the second NUMA node, wherein the two or more virtual proximity domains are defined via the one or more OS interface tables. 
 
     
     
       22. The method of  claim 18 , further including defining more than two virtual proximity domains within the NUMA node via the one or more OS interface tables.