Tiling of cross-resonance gates for quantum circuits

Abstract

Techniques regarding tiling a CR gate configuration to one or more lattices characterizing quantum circuit topologies are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a tiling component that can generate a cross-resonance gate configuration that delineates a control qubit assignment and a target qubit assignment in conjunction with a frequency allocation onto a lattice characterizing a quantum circuit topology.

What is claimed is: 
     
       1. A system, comprising:
 a memory that stores computer executable components; and 
 a processor, operably coupled to the memory, and that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
 a tiling component that generates an optimal tiling of cross-resonance gates for a quantum circuit topology, wherein the optimal tiling concurrently maximizes pairwise cross-resonance gate speeds of the cross-resonance gates, minimizes pairwise cross-resonance gate errors of the cross-resonance gates, and minimizes multi-qubit frequency collisions of the cross-resonance gates, and wherein generating the optimal tiling comprises:
 generating a cross-resonance gate configuration that delineates control qubit assignments and target qubit assignments in conjunction with a frequency allocation onto a heavy lattice characterizing the quantum circuit topology; and 
 assigning qubit types to qubits of the heavy lattice, wherein:
 respective qubits in each pair of nearest neighboring qubits of the heavy lattice comprises distinct qubit types, and 
 respective qubits in each pair of next-nearest neighboring qubits of the heavy lattice comprises distinct qubit types. 
 
 
 
 
     
     
       2. The system of  claim 1 , wherein the control qubit assignments and the target qubit assignments assign control roles and target roles to the qubits of the heavy lattice heavy lattice. 
     
     
       3. The system of  claim 1 , further comprising:
 a role component that determines the control qubit assignments and the target qubit assignments by defining a cross-resonance direction within a sub-block of the heavy lattice. 
 
     
     
       4. The system of  claim 3 , further comprising:
 a region component that assigns a region of operation to a pairing of the control qubit assignments and the target qubit assignments based on a cross-resonance gate speed value and a coherent error value. 
 
     
     
       5. The system of  claim 4 , further comprising:
 a parameter component that achieves the frequency allocation by setting a control qubit-to-target qubit detuning parameter associated with the pairing based on the region of operation. 
 
     
     
       6. The system of  claim 5 , further comprising:
 a collision component that adjusts the control qubit-to-target qubit detuning parameter to minimize a likelihood of frequency collisions associated with the cross-resonance gate configuration. 
 
     
     
       7. The system of  claim 5 , wherein the heavy lattice is a heavy-hexagon lattice, wherein the role component assigns five of the distinct qubit types, and wherein adjacent control qubit-to-target qubit detuning parameters on an edge of the heavy-hexagon lattice alternates between a first region of operation and a second region of operation. 
     
     
       8. A computer-implemented method, comprising:
 generating, by a system operatively coupled to a processor, an optimal tiling of cross-resonance gates for a quantum circuit topology, wherein the optimal tiling concurrently maximizes pairwise cross-resonance gate speeds of the cross-resonance gates, minimizes pairwise cross-resonance gate errors of the cross-resonance gates, and minimizes multi-qubit frequency collisions of the cross-resonance gates, and wherein generating the optimal tiling comprises:
 generating a cross-resonance gate configuration that delineates control qubit assignments and target qubit assignments in conjunction with a frequency allocation onto a heavy lattice characterizing the quantum circuit topology; and
 assigning qubit types to qubits of the heavy lattice, wherein:
 respective qubits in each pair of nearest neighboring qubits of the heavy lattice comprises distinct qubit types, and 
 respective qubits in each pair of next-nearest neighboring qubits of the heavy lattice comprises distinct qubit types. 
 
 
 
 
     
     
       9. The computer-implemented method of  claim 8 , wherein the control qubit assignments and the target qubit assignments assign control roles and target roles to qubits of the heavy lattice. 
     
     
       10. The computer-implemented method of  claim 8 , further comprising:
 determining, by the system, the control qubit assignments and the target qubit assignments by defining a cross-resonance direction within a sub-block of the heavy lattice. 
 
     
     
       11. The computer-implemented method of  claim 10 , further comprising:
 assigning, by the system, a region of operation to a pairing of the control qubit assignments and the target qubit assignments based on a cross-resonance gate speed value and a coherent error value. 
 
     
     
       12. The computer-implemented method of  claim 11 , further comprising:
 achieving, by the system, the frequency allocation by setting a control qubit-to-target qubit detuning parameter associated with the pairing based on the region of operation. 
 
     
     
       13. The computer-implemented method of  claim 12 , further comprising:
 adjusting, by the system, the control qubit-to-target qubit detuning parameter to minimize a likelihood of frequency collisions associated with the cross-resonance gate configuration. 
 
     
     
       14. The computer-implemented method of  claim 12 , wherein the heavy lattice is a heavy-hexagon lattice, wherein five distinct qubit types are assigned, and wherein adjacent control qubit-to-target qubit detuning parameters on an edge of the heavy-hexagon lattice alternates between a first region of operation and a second region of operation. 
     
     
       15. A computer program product for tiling cross-resonance gates for a quantum circuit topology, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to:
 generate, by the processor, an optimal tiling of the cross-resonance gates for the quantum circuit topology, wherein the optimal tiling concurrently maximizes pairwise cross-resonance gate speeds of the cross-resonance gates, minimizes pairwise cross-resonance gate errors of the cross-resonance gates, and minimizes multi-qubit frequency collisions of the cross-resonance gates, and wherein generating the optimal tiling comprises:
 generating a cross-resonance gate configuration that delineates control qubit assignments and target qubit assignments in conjunction with a frequency allocation onto a heavy lattice characterizing the quantum circuit topology; and
 assigning qubit types to qubits of the heavy lattice, wherein:
 respective qubits in each pair of nearest neighboring qubits of the heavy lattice comprises distinct qubit types, and 
 respective qubits in each pair of next-nearest neighboring qubits of the heavy lattice comprises distinct qubit types. 
 
 
 
 
     
     
       16. The computer program product of  claim 15 , wherein the control qubit assignments and the target qubit assignments assign control roles and target roles to qubits of the heavy lattice. 
     
     
       17. The computer program product of  claim 15 , wherein the program instructions further cause the processor to:
 determine, by the processor, the control qubit assignments and the target qubit assignments by defining a cross-resonance direction within a sub-block of the heavy lattice. 
 
     
     
       18. The computer program product of  claim 17 , wherein the program instructions further cause the processor to:
 assign, by the processor, a region of operation to a pairing of the control qubit assignments and the target qubit assignments based on a cross-resonance gate speed value and a coherent error value. 
 
     
     
       19. The computer program product of  claim 18 , wherein the program instructions further cause the processor to:
 achieve, by the processor, the frequency allocation by setting a control qubit-to-target qubit detuning parameter associated with the pairing based on the region of operation; and 
 adjust, by the processor, the control qubit-to-target qubit detuning parameter to minimize a likelihood of frequency collisions associated with the cross-resonance gate configuration. 
 
     
     
       20. The computer program product of  claim 19 , wherein the heavy lattice is a heavy-hexagon lattice, wherein five distinct qubit types are assigned, and wherein adjacent control-target detuning parameters on an edge of the heavy-hexagon lattice alternates between a first region of operation and a second region of operation.