Time and frequency domain signal conditioning device for switching noise jitter (SNJ) reduction, and methods of making the same

Abstract

A time and frequency domain signal conditioning device including one or more signal terminals, one or more rails, and a passive signal conditioning means for reducing a switching noise jitter signature present in an output signal of a feedback control loop circuitry with a plurality of noise carrying jittering ramps is disclosed. The passive signal conditioning means including the rails is characterized by a set of specified characteristics to condition pre-existing noise amplitude and slopes of the output signal such that the conditioned output signal cooperates with the feedback control loop circuitry. As a consequence, the switching noise jitter signature which is produced by transient noise displacement or noise perturbation in the time domain when the output signal jitters can be reduced in the output of the feedback control loop circuitry.

What is claimed is: 
     
       1. A switching mode DC-DC converter circuit topology comprising:
 a switching block comprising: an output path including a switching node and a feedback path including a feedback node, the output path and the feedback path having a pulse train voltage waveform including a first switching noise jitter signature; 
 a filter circuit arrangement comprising:
 an inductor in communication with the output path, connected to the switching node and the feedback node; 
 
 a first rail of a passive signal conditioning device in communication with the inductor, the passive signal conditioning device; and 
 a decoupling capacitor in sequence with the passive signal conditioning device; and 
 an output rail in communication with the decoupling capacitor conveying an output signal switched at one or more use frequencies falling within a predetermined frequency range, the output signal having a second switching noise jitter signature that is reduced compared to the first switching noise jitter signature upon modification and reduction of a pre-existing noise amplitude and a plurality of noise carrying jittering ramps of the pulse train voltage waveform. 
 
     
     
       2. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the passive signal conditioning device comprises: a equivalent series resistance (ESR) and a broadband attenuator. 
     
     
       3. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the passive signal conditioning device comprises: a capacitor having at least three terminals. 
     
     
       4. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the passive signal conditioning device: attenuates the pre-existing noise amplitude in a low frequency band of less than or equal to 1 MHz and in a high frequency band of greater than 1 MHz, such that a combined range of the low frequency band and the high frequency band is at least 100 MHz to result in the second switching noise jitter signature in the output signal, and steepens a plurality of slopes of the plurality of noise carrying jittering ramps. 
     
     
       5. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the passive signal conditioning device comprises a first predetermined signal conditioning equivalent series resistance (ESR) corresponding to the one or more use frequencies falling within the predetermined frequency range so as to cause a plurality of slopes of the plurality of noise carrying jittering ramps to be steepened at the output rail, corresponding to the one or more use frequencies falling within the predetermined frequency range, the first predetermined signal conditioning ESR falling within a predetermined range in ohms being greater than or equal to 8 milliohms corresponding to the one or more use frequencies falling within the predetermined frequency range. 
     
     
       6. The switching mode DC-DC converter circuit topology of  claim 5 , wherein the first predetermined signal conditioning ESR falling within the predetermined range corresponding to the one or more use frequencies falling within a predetermined frequency range of 10 Hz to 10 MHz, is greater than or equal to 8 milliohms to less than or equal to 2 ohms. 
     
     
       7. The switching mode DC-DC converter circuit topology of  claim 5 , wherein the first predetermined signal conditioning ESR falling within the predetermined range corresponding to the one or more use frequencies falling within a predetermined frequency range of approximately 1 MHz and below, is greater than or equal to 8 milliohms to less than or equal to 2 ohms. 
     
     
       8. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the decoupling capacitor comprises a low equivalent series resistance (low-ESR) multilayer ceramic chip capacitor (MLCC). 
     
     
       9. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the decoupling capacitor is connected in parallel to the passive signal conditioning device, and characterized by (i) a predetermined filter self-resonant frequency (SRF) and (ii) a corresponding predetermined filter equivalent series resistance (ESR) corresponding to the one or more use frequencies at and below the predetermined filter SRF such that a ratio of a first predetermined signal conditioning equivalent series resistance (ESR) to the corresponding predetermined filter ESR is greater than 1. 
     
     
       10. The switching mode DC-DC converter circuit topology of  claim 1 , wherein the output signal is DC. 
     
     
       11. A method of making a switching mode DC-DC converter circuit topology, the method comprising:
 assembling a switching block comprising: an output path including a switching node and a feedback path including a feedback node, the output path and the feedback path having a pulse train voltage waveform including a first switching noise jitter signature with a filter circuit arrangement comprising: an inductor in communication with the output path, connected to the switching node and the feedback node; a first rail of a passive signal conditioning device in communication with the inductor, the passive signal conditioning device; and a decoupling capacitor in sequence with the passive signal conditioning device; and an output rail in communication with the decoupling capacitor; and 
 conveying an output signal from the output rail, the output signal switched at one or more use frequencies falling within a predetermined frequency range, the output signal having a second switching noise jitter signature that is reduced compared to the first switching noise jitter signature upon modification and reduction of a pre-existing noise amplitude and a plurality of noise carrying jittering ramps of the pulse train voltage waveform. 
 
     
     
       12. The method of  claim 11 , wherein the passive signal conditioning device comprises: a equivalent series resistance (ESR) and a broadband attenuator. 
     
     
       13. The method of  claim 11 , wherein the passive signal conditioning device comprises: a capacitor having at least three terminals. 
     
     
       14. The method of  claim 11 , wherein the passive signal conditioning device: attenuates the pre-existing noise amplitude in a low frequency band of less than or equal to 1 MHz and in a high frequency band of greater than 1 MHz, such that a combined range of the low frequency band and the high frequency band is at least 100 MHz to result in the second switching noise jitter signature in the output signal, and steepens a plurality of slopes of the plurality of noise carrying jittering ramps. 
     
     
       15. The method of  claim 11 , wherein the passive signal conditioning device comprises a first predetermined signal conditioning equivalent series resistance (ESR) corresponding to the one or more use frequencies falling within the predetermined frequency range so as to cause a plurality of slopes of the plurality of noise carrying jittering ramps to be steepened at the output rail, corresponding to the one or more use frequencies falling within the predetermined frequency range, the first predetermined signal conditioning ESR falling within a predetermined range in ohms being greater than or equal to 8 milliohms corresponding to the one or more use frequencies falling within the predetermined frequency range. 
     
     
       16. The method of  claim 15 , wherein the first predetermined signal conditioning ESR falling within the predetermined range corresponding to the one or more use frequencies falling within a predetermined frequency range of 10 Hz to 10 MHz, is greater than or equal to 8 milliohms to less than or equal to 2 ohms. 
     
     
       17. The method of  claim 15 , wherein the first predetermined signal conditioning ESR falling within the predetermined range corresponding to the one or more use frequencies falling within a predetermined frequency range of approximately 1 MHz and below, is greater than or equal to 8 milliohms to less than or equal to 2 ohms. 
     
     
       18. The method of  claim 15 , wherein the decoupling capacitor comprises a low equivalent series resistance (low-ESR) multilayer ceramic chip capacitor (MLCC). 
     
     
       19. The method of  claim 15 , wherein the decoupling capacitor is connected in parallel to the passive signal conditioning device, and characterized by (i) a predetermined filter self-resonant frequency (SRF) and (ii) a corresponding predetermined filter equivalent series resistance (ESR) corresponding to the one or more use frequencies at and below the predetermined filter SRF such that a ratio of a first predetermined signal conditioning equivalent series resistance (ESR) to the corresponding predetermined filter ESR is greater than 1. 
     
     
       20. The method of  claim 15 , wherein the output signal is DC.