Cell voltage drop compensation circuit

Abstract

In some aspects, the techniques described herein relate to a circuit including: a memory cell; a source follower, a source terminal of the source follower communicatively coupled to the memory cell; a voltage source; an operational amplifier, a non-inverting input of the operational amplifier communicatively coupled to the voltage source; and a replica source follower, a gate of the replica source follower communicatively coupled to an output of the operational amplifier and a source terminal of the replica source follower communicatively coupled to an inverting input of the operational amplifier via a feedback loop.

The invention claimed is: 
     
       1. A circuit comprising:
 a memory cell; 
 control circuitry communicatively coupled to the memory cell; 
 a source follower, a source terminal of the source follower communicatively coupled to the control circuitry; 
 a voltage source; 
 an operational amplifier, a non-inverting input of the operational amplifier communicatively coupled to the voltage source; 
 a replica source follower, a gate of the replica source follower communicatively coupled to an output of the operational amplifier and a source terminal of the replica source follower communicatively coupled to an inverting input of the operational amplifier via a feedback loop, the feedback loop including replica control circuitry; and 
 a current source communicatively coupled to an output of the replica control circuitry. 
 
     
     
       2. The circuit of  claim 1 , wherein a drain terminal of the replica source follower and a drain terminal of the source follower are communicatively coupled to a fixed voltage source. 
     
     
       3. The circuit of  claim 1 , wherein the replica control circuit is identical to a control circuit situated between the source follower and the memory cell. 
     
     
       4. The circuit of  claim 1 , wherein the replica control circuit includes a plurality of active circuit elements. 
     
     
       5. The circuit of  claim 1 , wherein the replica control circuit includes at least one element contributing a voltage drop. 
     
     
       6. The circuit of  claim 1 , wherein the output of the operational amplifier is further communicatively coupled to the source follower. 
     
     
       7. A circuit comprising:
 a first voltage regulator, the first voltage regulator generating a first voltage; 
 a second voltage regulator, the second voltage regulator generating a second voltage, the second voltage comprising an adjusted voltage determining by sampling one or more voltage drops across one or more circuit elements; and 
 a switching mechanism, the switching mechanism capable of programmatically selecting between supplying the first voltage and the second voltage to a memory cell. 
 
     
     
       8. The circuit of  claim 7 , wherein the second voltage regulator comprises an operational amplifier and a replica source follower, wherein an inverting terminal of the operational amplifier is communicatively coupled to a source terminal of the source follower. 
     
     
       9. The circuit of  claim 7 , further comprising a monitoring circuit configured to receive the adjusted voltage and output the adjusted voltage in response to a control signal. 
     
     
       10. The circuit of  claim 7 , wherein the switching mechanism is programmatically controlled. 
     
     
       11. The circuit of  claim 7 , further comprising a third voltage regulator and a fourth voltage regulator, the third voltage regulator generating a third voltage output, and the fourth voltage regulator generating a fourth adjusted voltage, wherein the third voltage regulator and the fourth voltage regulator are communicatively coupled to a negative side of the memory cell. 
     
     
       12. The circuit of  claim 11 , wherein the switching mechanism is further configured to select between the third voltage regulator and the fourth voltage regulator. 
     
     
       13. A method comprising:
 sampling voltage drops across one or more circuit elements; 
 adjusting a target voltage based on the voltage drops to obtain an adjusted target voltage; and 
 supplying the adjusted target voltage to a memory cell by switching between two voltage regulators. 
 
     
     
       14. The method of  claim 13 , wherein sampling voltage drops across one or more circuit elements comprises sampling a voltage drop of a replica source follower by hardwiring a source terminal of the replica source follower to an inverting input of an operational amplifier. 
     
     
       15. The method of  claim 14 , wherein the target voltage comprises a voltage applied to a non-inverting input of the operational amplifier. 
     
     
       16. The method of  claim 15 , wherein adjusting the target voltage based on the voltage drops comprises increasing an output voltage of the operational amplifier. 
     
     
       17. The method of  claim 13 , wherein sampling voltage drops across one or more circuit elements comprises sampling a voltage drop of a replica source follower and one or more replica control circuit elements by hardwiring a terminal a final circuit element in the one or more replica control circuit elements to an inverting input of an operational amplifier. 
     
     
       18. The method of  claim 13 , wherein supplying an adjusted target voltage to a memory element based on the sampling comprises supplying the adjusted target voltage to the memory element in response to a control signal.