Memory controller and method of operating the same

Abstract

The present technology relates to an electronic device. According to the present technology, a memory controller may include a latency monitor and an operation controller. The latency monitor may count an over-latency count value representing a number of over-latencies exceeding a reference value among latencies for requests from a host during each of a plurality of periods, calculate gaps which are difference values between the over-latency count values of the plurality of periods, and generate latency information including the over-latency count values and the gaps. The operation controller may determine, based on the latency info oration, whether each gap between at least two target periods among the plurality of periods exceeds a threshold value, and delay a response to the requests according to a determination result.

What is claimed is: 
     
       1. A memory controller comprising:
 a latency monitor configured to count an over-latency count value representing a number of over-latencies exceeding a reference value among latencies for requests from a host during each of a plurality of periods, calculate gaps which are difference values between the over-latency count values of the plurality of periods, and generate latency information including the over-latency count values and the gaps; and 
 an operation controller configured to determine, based on the latency information, whether each gap corresponding to at least two target periods among the plurality of periods exceeds a threshold value, and delay a response to the requests according to a determination result. 
 
     
     
       2. The memory controller of  claim 1 , wherein the target periods are successive periods. 
     
     
       3. The memory controller of  claim 1 , wherein the latency monitor is configured to generate the latency information ire response to an enable command received from the host. 
     
     
       4. The memory controller of  claim 3 , wherein the enable command includes a set feature command. 
     
     
       5. The memory controller of  claim 1 , wherein the latency monitor is configured to generate the latency information when an operation condition of a memory device is out of a normal range. 
     
     
       6. The memory controller of  claim 5 ,
 further comprising an environment manager configured to generate environmental information indicating whether the operation condition is out of the normal range, 
 wherein the operation condition includes at least one of a temperature, a humidity, a voltage, and a current of the memory device. 
 
     
     
       7. The memory controller of  claim 1 , wherein the latency monitor is configured to generates the latency information when it is deter mined that a memory device is in a deterioration state. 
     
     
       8. The memory controller of  claim 7 , further comprising a state manager configured to:
 store erase and write count values of each of a plurality of memory blocks included in the memory device, and 
 generate deterioration information indicating whether the memory device is in the deterioration state based on whether a difference between erase and write count values of the respective memory blocks is equal to or greater than a set value. 
 
     
     
       9. The memory controller of  claim 1 , wherein the operation controller is further configured to set a response time of the response to a default value when at least one of the gaps corresponding to the target periods is equal to or less than the threshold value. 
     
     
       10. The memory controller of  claim 1 , wherein the operation controller is further configured to delay the response by setting a response time of the response based on a default value and the over-latency count values of the target periods when each gap corresponding to the target periods exceeds the threshold value. 
     
     
       11. The memory controller of  claim 10 , wherein the operation controller is configured to set the response time by:
 calculating a first value by subtracting an allowable over-latency count value from the over-latency count value of a most recent period among the target periods, and 
 setting the response time to a value obtained by adding the default value to a second value obtained by multiplying the first value by a preset weighted value. 
 
     
     
       12. The memory controller of  claim 1 , wherein the operation controller is configured to delay the response when garbage collection for a memory device is being performed. 
     
     
       13. A method of operating a memory controller, the method comprising:
 counting an over-latency count value representing a number of over-latencies exceeding a reference value among latencies for requests of a host during each of a plurality of periods; 
 calculating gaps which are difference values between the over-latency count values of the plurality of periods; 
 generating latency information including the over-latency count values and the gaps; 
 determining, based on the latency information, whether each gap corresponding to at least two target periods among the plurality of periods exceeds a threshold value; and 
 delaying a response to the requests according to a result of the determining. 
 
     
     
       14. The method of  claim 13 , wherein the target periods are successive periods. 
     
     
       15. The method of  claim 13 , wherein the latency information is generated in response to an enable command received from the host. 
     
     
       16. The method of  claim 13 ,
 further comprising generating environmental information indicating whether an operation condition of a memory device including at least one of a temperature, a humidity, a voltage, and a current of the memory device is out of a normal range, 
 wherein the latency information is generated when the operation condition is out of the normal range according to the environment information. 
 
     
     
       17. The method of  claim 13 ,
 further comprising generating deterioration information indicating whether a memory device is in a deterioration state according to whether a difference between erase and write count values of respective memory blocks included in the memory device is equal to or greater than a set value, 
 wherein the latency information is generated when it is determined that the memory device is in the deterioration state according to the deterioration information. 
 
     
     
       18. The method of  claim 13 , further comprising setting a response time of the response to a default value when at least one of the gaps corresponding to the target periods is equal to or less than the threshold value. 
     
     
       19. The method of  claim 13 , wherein the delaying the response comprises setting a response time of the response based on a default value and the over-latency count values of the target periods when each gap corresponding to the target periods exceeds the threshold value. 
     
     
       20. The method of  claim 19 ,
 wherein the response time is set to a value obtained by adding the default value to a second value obtained by multiplying a first value by a preset weighted value, and 
 wherein the first value is a value obtained by subtracting an allowable over-latency count value from the over-latency count value of a most recent period among the target periods.