US12068337B2ActiveUtilityA1

Image sensor

97
Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Nov 6, 2018Filed: May 9, 2023Granted: Aug 20, 2024
Est. expiryNov 6, 2038(~12.3 yrs left)· nominal 20-yr term from priority
H10F 39/18H10F 39/807H10F 39/011H10F 39/8037H10F 39/802H10F 39/199H10F 39/8023H10F 39/014H04N 25/40H01L 27/14605H10P 14/416H10P 14/6922H10P 14/6902H10P 14/687
97
PatentIndex Score
2
Cited by
38
References
20
Claims

Abstract

An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An image sensor, comprising:
 a semiconductor substrate having a first surface and a second surface opposite the first surface; 
 a transmission gate in a gate trench extending from the first surface of the semiconductor substrate toward an inside of the semiconductor substrate; and 
 a pixel isolation film in a pixel trench penetrating through the semiconductor substrate, the pixel isolation film defining active pixels in the semiconductor substrate, 
 wherein the pixel isolation film includes:
 an insulating liner on an inner wall of the pixel trench; 
 a buried layer on the insulating liner and filling a portion of the pixel trench; and 
 a buried insulating layer disposed in a remaining portion of the pixel trench, and 
 
 wherein a portion of the insulating liner is disposed between a sidewall of the buried insulating layer and the inner wall of the pixel trench. 
 
     
     
       2. The image sensor as claimed in  claim 1 , wherein
 a first distance from the first surface of the semiconductor substrate to a bottom surface of the buried layer is different from a second distance from the first surface of the semiconductor substrate to a top surface of the transmission gate disposed in the gate trench. 
 
     
     
       3. The image sensor as claimed in  claim 1 , wherein:
 the buried layer includes a P-type dopant or an N-type dopant, 
 the P-type dopant includes boron, aluminum, or indium, and 
 the N-type dopant includes phosphorus, arsenic, or antimony. 
 
     
     
       4. The image sensor as claimed in  claim 1 , wherein the pixel trench extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate. 
     
     
       5. The image sensor as claimed in  claim 4 , wherein:
 the insulating liner extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate, and 
 the insulating liner is in contact with the semiconductor substrate. 
 
     
     
       6. The image sensor as claimed in  claim 5 , wherein:
 the buried layer is not in contact with the semiconductor substrate, and 
 the buried insulating layer is not in contact with the semiconductor substrate. 
 
     
     
       7. The image sensor as claimed in  claim 1 , wherein:
 the buried layer has an average grain size of about 30 nm or less, and 
 the buried layer has a full width at half maximum of an X-ray diffraction peak by a silicon (111) crystal plane observed in an X-ray diffraction analysis of about 0.4° to about 1.1°. 
 
     
     
       8. The image sensor as claimed in  claim 1 , further comprising:
 an interconnection structure on the first surface of the semiconductor substrate; and 
 a microlens on the second surface of the semiconductor substrate, 
 wherein the pixel isolation film extends from the first surface to the second surface of the semiconductor substrate and passes through the semiconductor substrate. 
 
     
     
       9. The image sensor as claimed in  claim 1 , wherein the pixel trench has a first width at a same level as the first surface of the semiconductor substrate and a second width that is smaller than the first width at a same level as the second surface. 
     
     
       10. The image sensor as claimed in  claim 9 , wherein a ratio of a first height in a direction perpendicular to the first surface with respect to the first width is about 20 to about 100. 
     
     
       11. An image sensor, comprising:
 a semiconductor substrate having a first surface and a second surface opposite the first surface; and 
 a pixel isolation film in a pixel trench, the pixel trench penetrating through the semiconductor substrate, the pixel isolation film defining active pixels in the semiconductor substrate, 
 wherein the pixel isolation film includes:
 an insulating liner on an inner wall of the pixel trench; 
 a buried layer on the insulating liner and filling a portion of the pixel trench; and 
 a buried insulating layer disposed in a remaining portion of the pixel trench, 
 
 wherein a portion of the insulating liner is disposed between a sidewall of the buried insulating layer and the inner wall of the pixel trench such that the buried insulating layer is not in contact with the semiconductor substrate, and 
 wherein the buried insulating layer vertically overlaps the buried layer. 
 
     
     
       12. The image sensor as claimed in  claim 11 , wherein the pixel trench extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate. 
     
     
       13. The image sensor as claimed in  claim 12 , wherein:
 the insulating liner extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate, and 
 the insulating liner is in contact with the semiconductor substrate. 
 
     
     
       14. The image sensor as claimed in  claim 13 , wherein the buried layer is not in contact with the semiconductor substrate. 
     
     
       15. The image sensor as claimed in  claim 11 , further comprising:
 an interconnection structure on the first surface of the semiconductor substrate; and 
 a microlens on the second surface of the semiconductor substrate, 
 wherein the pixel isolation film extends from the first surface to the second surface of the semiconductor substrate and passes through the semiconductor substrate. 
 
     
     
       16. An image sensor, comprising:
 a semiconductor substrate having a first surface and a second surface opposite the first surface; 
 an isolation film in an isolation trench extending from the first surface of the semiconductor substrate toward an inside of the semiconductor substrate, the isolation film defining an active region in the semiconductor substrate; and 
 a pixel isolation film in a pixel trench penetrating through the semiconductor substrate, the pixel isolation film defining active pixels in the semiconductor substrate, 
 wherein the pixel isolation film includes:
 an insulating liner on an inner wall of the pixel trench; 
 a buried layer on the insulating liner and filling a portion of the pixel trench; and 
 a buried insulating layer disposed in a remaining portion of the pixel trench, 
 
 wherein a portion of the insulating liner is disposed between a sidewall of the buried insulating layer and the inner wall of the pixel trench, 
 wherein a bottom surface of the buried layer is spaced apart from the first surface of the semiconductor substrate, and 
 wherein a first distance from the first surface of the semiconductor substrate to the bottom surface of the buried layer is greater than a second distance from the first surface of the semiconductor substrate to a top surface of the isolation film. 
 
     
     
       17. The image sensor as claimed in  claim 16 , wherein the insulating liner extends from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate. 
     
     
       18. The image sensor as claimed in  claim 17 , wherein:
 the pixel isolation film includes a first end and a second end, the first end is disposed adjacent to the first surface of the semiconductor substrate, the second end is disposed adjacent to the second surface of the semiconductor substrate, 
 at the first end of the pixel isolation film, both sidewalls of the buried insulating layer are covered by the insulating liner, and 
 at the second end of the pixel isolation film, both sidewalls of the buried layer are covered by the insulating liner. 
 
     
     
       19. The image sensor as claimed in  claim 18 , further comprising:
 a rear insulating layer disposed on the second surface of the semiconductor substrate; and 
 a guide pattern on the rear insulating layer, the guide pattern being at a position vertically overlapping the pixel isolation film. 
 
     
     
       20. The image sensor as claimed in  claim 19 , wherein, at the second end of the pixel isolation film, a top surface of the insulating liner is in contact with the rear insulating layer.

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