Multi-layer coating
Abstract
The invention relates to a method for coating a substrate 40 , a coating system for carrying out the method, and a coated body. In a first method step 62 , the substrate 40 is pretreated in a ion etching process. In a second method step 64 , a first coating layer 56 a with a thickness of 0.1 μm to 6 μm is deposited on the substrate 40 by means of a PVD process. In order to achieve a particularly high-quality and durable coating 50 , the surface of the first coating layer 56 a is treated by means of an ion etching process in a third method step 66 , and an additional coating layer 56 b with a thickness of 0.1 μm to 6 μm is deposited on the first coating layer 56 a by means of a PVD process in a fourth method step 68 . The coated body comprises at least two coating layers 56 a, 56 b, 56 c, 56 d with a thickness of 0.1 μm to 6 μm on a substrate 40 , wherein an interface region formed by ion etching is arranged between the coating layers 56 a, 56 b, 56 c, 56 d.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A method for coating a substrate, wherein
in a first method step, the substrate is pretreated in an ion etching process which is carried out as a first etching substep with an mf-pulsed bias voltage and a second etching substep with a constant DC bias voltage,
in a second method step, a first coating layer with a thickness of 0.1 μm to 6 μm is deposited on the substrate by means of a HIPIMS PVD cathode sputtering process using HIPIMS pulses applied to a cathode, the HIPIMS PVD cathode sputtering process being carried out while a DC bias voltage is applied to the substrate in bias pulses, said bias pulses being temporally synchronized with the HIPIMS pulses applied to the cathode,
in a third method step, the surface of the first coating layer is treated by means of an ion etching process,
in a fourth method step, at least one additional coating layer with a thickness of 0.1 μm to 6 μm is deposited on the first coating layer by means of a PVD cathode sputtering process,
wherein the thickness of the coating layers deposited on top of each other is 12 μm to 30 μm in total,
wherein an interface region is formed between the first coating layer and the additional coating layer thereon,
wherein the structure of the additional coating layer adjoining the interface region is finer than the structure of the first coating layer adjoining the interface region,
and wherein the thicknesses of the first coating layer and the at least one additional coating layer differ by less than +/−50%.
2. The method according to claim 1 , characterized in that
following on from the fourth method step, once or multiple times,
initially, the surface of the uppermost coating layer is treated by means of an ion etching process,
and subsequently, an additional coating layer is deposited on the underlying coating layer by means of the PVD cathode sputtering process.
3. The method according to claim 1 , characterized in that
at least the second, third and fourth method step are performed without the vacuum being interrupted.
4. The method according to claim 1 , characterized in that
a bias voltage is applied to the substrate in each case in the first, second, third and fourth method step,
wherein the bias voltage is higher in the third method step than in the second and fourth method step.
5. The method according to claim 1 , characterized in that
metal ions are generated during the ion etching process and accelerated by means of a bias voltage towards the substrate surface.
6. The method according to claim 1 , characterized in that one or more of the coating layers at least substantially comprises a composition selected from the group comprising
Al—Ti—N,
Ti—B,
Ti—Si—N,
Al—Ti—Si—N,
Ti—C—N,
Ti—Al—C—N,
Al—Ti—Cr—Si—N.
7. The method according to claim 1 , characterized in that
a plurality of the coating layers are produced from the same elements.
8. The method according to claim 1 , characterized in that
the substrate is a tool having at least one cutting edge.Cited by (0)
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