Wireless battery system and related methods

Abstract

Methods, apparatus, systems and articles of manufacture are described for a wireless battery system. An example apparatus includes at least one memory, instructions, and processor circuitry to at least one of instantiate or execute the instructions to identify a first battery node to transmit an uplink command during a first superframe interval, transmit a downlink command to the first battery node and a second battery node, the first battery node to switch in the first superframe interval from a receive state to a transmit state in response to the downlink command, the first battery node to transmit the uplink command in the transmit state, and receive the uplink command from the first battery node in the first superframe interval.

What is claimed is: 
     
       1. An apparatus comprising:
 at least one memory; 
 instructions; and 
 processor circuitry configured to at least one of instantiate or execute the instructions to:
 identify a first battery node to transmit an uplink command during a first superframe interval; 
 transmit a downlink command to the first battery node and a second battery node, the first battery node to switch in the first superframe interval from a receive state to a transmit state in response to the downlink command, the first battery node to transmit the uplink command in the transmit state; and 
 receive the uplink command from the first battery node in the first superframe interval. 
 
 
     
     
       2. The apparatus of  claim 1 , wherein the processor circuitry is configured to transmit the downlink command in the first superframe interval, the uplink command is a first uplink command, and the processor circuitry is configured to:
 cause the second battery node to enter a sleep mode in the first superframe interval after receiving the downlink command; and 
 cause the second battery node in a second superframe interval to switch from the receive state to the transmit state, the second battery node to transmit a second uplink command in the second superframe interval, the second superframe interval after the first superframe interval. 
 
     
     
       3. The apparatus of  claim 1 , wherein the uplink command is a first uplink command, and the processor circuitry is configured to:
 receive a second uplink command from the second battery node during the first superframe interval; and 
 transmit the downlink command after the receipt of the second uplink command, the receipt of the first uplink command to begin the first superframe interval, the transmission of the downlink command to end the first superframe interval. 
 
     
     
       4. The apparatus of  claim 3 , wherein the processor circuitry is configured to:
 after the transmission of the downlink command, receive a third uplink command from the first battery node during a second superframe interval, the second superframe interval after the first superframe interval; and 
 after the receipt of the third uplink command, receive a fourth uplink command from the second battery node during the second superframe interval. 
 
     
     
       5. The apparatus of  claim 1 , wherein the first battery node is in an active mode during the first superframe interval and the second battery node is in a standby mode in the first superframe interval after the receipt of the downlink command. 
     
     
       6. The apparatus of  claim 1 , wherein the downlink command is a first downlink command in a wakeup train interval, and the processor circuitry is configured to:
 broadcast second downlink commands at a first frequency to the first battery node and the second battery node in the wakeup train interval; and 
 broadcast third downlink commands at a second frequency to the first battery node and the second battery node in superframe intervals after the wakeup train interval, the first frequency greater than the second frequency. 
 
     
     
       7. The apparatus of  claim 1 , wherein the downlink command includes a request for measurement data associated with the first battery node, the measurement data including at least one of a current, a voltage, or a temperature of the first battery node. 
     
     
       8. The apparatus of  claim 1 , wherein the processor circuitry is configured to generate the downlink command to cause the first battery node to switch from the receive state to the transmit state and to cause the second battery node to enter a sleep mode. 
     
     
       9. The apparatus of  claim 1 , wherein the first battery node includes a first battery, the second battery node includes a second battery, and the processor circuitry is configured to:
 determine a first state of charge of the first battery node based on a first measurement associated with the first battery node; 
 determine a second state of charge of the second battery node based on a second measurement associated with the second battery node; and 
 generate the downlink command to include a first cell balancing command and a second cell balancing command, the first cell balancing command to cause the first battery to be charged based on the first state of charge, the second cell balancing command to cause the second battery to not be charged based on the second state of charge. 
 
     
     
       10. The apparatus of  claim 9 , wherein the processor circuitry is configured to:
 compare the second measurement to a threshold; and 
 in response to the second measurement satisfying the threshold, detect an anomaly associated with the second battery, the anomaly indicative of the second state of charge being greater than the first state of charge. 
 
     
     
       11. The apparatus of  claim 1 , wherein the processor circuitry is configured to:
 wake up from a standby mode; 
 transmit a first train of wakeup packets to the first battery node and the second battery node after waking up from the standby mode; 
 transmit the downlink command after transmitting the first train of wakeup packets; and 
 transmit a second train of wakeup packets to the first battery node and the second battery node after receiving the uplink command. 
 
     
     
       12. The apparatus of  claim 11 , wherein the processor circuitry is configured to:
 determine that a time duration of the first train of wakeup packets has elapsed; and 
 transmit the downlink command in response to determining that the time duration of the first train of wakeup packets has elapsed. 
 
     
     
       13. The apparatus of  claim 11 , wherein the processor circuitry is configured to:
 transmit a second downlink command to the first battery node and the second battery node after receiving the uplink command; and 
 transmit the second train of wakeup packets after transmitting the second downlink command. 
 
     
     
       14. The apparatus of  claim 11 , wherein the processor circuitry is configured to interleave a superframe interval including the downlink command and the uplink command between the first and second trains of wakeup packets. 
     
     
       15. Battery management control circuitry comprising:
 battery control circuitry to identify a first battery node to transmit an uplink command; and 
 battery communication circuitry coupled to the battery control circuitry, the battery communication circuitry configured to:
 transmit a downlink command to a set of battery nodes including the first battery node, the first battery node to switch from a receive operation state to a transmit operation state in response to the downlink command, the first battery node to transmit the uplink command in the transmit operation state; and 
 receive the uplink command from the first battery node. 
 
 
     
     
       16. The battery management control circuitry of  claim 15 , wherein the uplink command is received in a superframe interval to start the superframe interval, the downlink command is transmitted in the superframe interval to end the superframe interval. 
     
     
       17. The battery management control circuitry of  claim 16 , wherein the uplink command is a first uplink command, the downlink command is a first downlink command, the superframe interval is a first superframe interval, and the battery communication circuitry is configured to:
 after the receipt of the first uplink command, receive a second uplink command from a third battery node during the first superframe interval, the set of battery nodes including the third battery node; 
 after the receipt of the second uplink command, transmit the first downlink command to the set of battery nodes to end the superframe interval; and 
 after the transmission of the first downlink command, receive a third uplink command from the first battery node to begin a second superframe interval after the first superframe interval. 
 
     
     
       18. The battery management control circuitry of  claim 17 , wherein at least one of the battery communication circuitry, the battery control circuitry, or the set of battery nodes are in an active mode during the first superframe interval, and at least one of the battery communication circuitry, the battery control circuitry, or the set of battery nodes are in a standby mode between the first superframe interval and the second superframe interval. 
     
     
       19. The battery management control circuitry of  claim 15 , wherein the downlink command is a first downlink command in a wakeup train interval, and the battery communication circuitry is configured to:
 broadcast second downlink commands at a first frequency to the set of battery nodes in the wakeup train interval; and 
 broadcast third downlink commands at a second frequency to the set of battery nodes in superframe intervals, the first frequency greater than the second frequency. 
 
     
     
       20. The battery management control circuitry of  claim 15 , wherein the first battery node includes a first battery, the set of battery nodes include a third battery node, the third battery node including a second battery, and the battery control circuitry is configured to:
 determine a first state of charge of the first battery node based on a first measurement associated with the first battery node; 
 determine a second state of charge of the third battery node based on a second measurement associated with the third battery node; and 
 generate the downlink command to include a first cell balancing command and a second cell balancing command, the first cell balancing command to cause the first battery to be charged based on the first state of charge, the second cell balancing command to cause the second battery to not be charged based on the second state of charge. 
 
     
     
       21. The battery management control circuitry of  claim 20 , further including vehicle communication circuitry coupled to the battery control circuitry, and wherein:
 the battery control circuitry is configured to:
 compare the second measurement to a threshold; and 
 in response to the second measurement satisfying the threshold, detect an anomaly associated with the second battery, the anomaly indicative of the second state of charge being greater than the first state of charge; and 
 
 the vehicle communication circuitry is to transmit an alert to an electronic control unit of a vehicle, the alert including the detection of the anomaly. 
 
     
     
       22. The battery management control circuitry of  claim 15 ,
 wherein the battery control circuitry is configured to wake up from a standby mode, and 
 wherein the battery communication circuitry is configured to:
 transmit a first train of wakeup packets to the set of battery nodes after the battery control circuitry wakes up from the standby mode; 
 transmit the downlink command after transmitting the first train of wakeup packets; and 
 transmit a second train of wakeup packets to the set of battery nodes after receiving the uplink command. 
 
 
     
     
       23. The battery management control circuitry of  claim 22 , wherein the battery control circuitry is configured to:
 determine that a time duration of the first train of wakeup packets has elapsed; and 
 cause the battery communication circuitry to transmit the downlink command in response to determining that the time duration of the first train of wakeup packets has elapsed. 
 
     
     
       24. The battery management control circuitry of  claim 22 , wherein the battery communication circuitry is configured to:
 transmit a second downlink command to the set of battery nodes after receiving the uplink command; and 
 transmit the second train of wakeup packets after transmitting the second downlink command. 
 
     
     
       25. A method comprising:
 identifying a first battery node to transmit an uplink command during a first superframe interval; 
 transmitting a downlink command to the first battery node and a second battery node, the first battery node to switch in the first superframe interval from a receive state to a transmit state in response to the downlink command, the first battery node to transmit the uplink command in the transmit state; and 
 receiving the uplink command from the first battery node in the first superframe interval.