US12432922B2ActiveUtilityA1

Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices

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Assignee: Intel NDTM US LLCPriority: Jul 23, 2020Filed: Jul 23, 2020Granted: Sep 30, 2025
Est. expiryJul 23, 2040(~14 yrs left)· nominal 20-yr term from priority
H10W 20/435H10W 20/056H10W 20/42G11C 16/0483H10B 41/27H10B 41/35H10B 43/35H10B 43/27H10B 43/50H10B 41/50H01L 23/5283H01L 23/5226H01L 21/76877
60
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Cited by
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References
21
Claims

Abstract

An apparatus, a method and a system. The apparatus comprises a memory array including word lines defining a staircase structure, and a staircase etch stop layer including: a sandwich etch stop layer disposed on a top region the staircase and including a first etch stop layer and a third etch stop layer of a first material, and a second etch stop layer sandwiched between the first etch stop layer and the third etch stop layer and made of a second material having etch properties different from the first material; a precut etch stop layer disposed at a region of the staircase structure below the top region and including the second etch stop layer and the third etch stop layer and not the first etch stop layer; and contact structures extending through a dielectric layer and the staircase etch stop layer and landing on the word lines at the staircase structure.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An apparatus comprising:
 a substrate including control circuitry therein; 
 a memory array electrically coupled to the control circuitry and including a plurality of word lines disposed to define a staircase structure, and a staircase etch stop layer including:
 a sandwich etch stop layer disposed on a top region the staircase structure furthest from the substrate and including a first etch stop layer and a third etch stop layer made of a first material, and a second etch stop layer sandwiched between the first etch stop layer and the third etch stop layer and made of a second material having etch properties different from those of the first material; 
 a precut etch stop layer disposed at a region of the staircase structure below the top region and including the second etch stop layer and the third etch stop layer and not the first etch stop layer; 
 a dielectric layer on the staircase etch stop layer; and 
 contact structures extending through the dielectric layer and the staircase etch stop layer and landing on the word lines at the staircase structure. 
 
 
     
     
       2. The apparatus of  claim 1 , wherein the staircase etch stop layer includes an underlying etch stop layer disposed between the staircase structure and the staircase etch stop layer. 
     
     
       3. The apparatus of  claim 1 , wherein the first material includes a nitride, and the second material includes an oxide. 
     
     
       4. The apparatus of  claim 1 , wherein:
 the sandwich etch stop layer further includes a fourth etch stop layer made of the second material, and a fifth etch stop layer made of the first material, the fourth etch stop layer between the third etch stop layer and the fifth etch stop layer; and 
 the precut etch stop layer is a first precut etch stop layer, and the region of the staircase structure below the top region is a first region of the staircase structure below the top region, wherein the staircase etch stop layer further includes a second precut etch stop layer disposed at a second region of the staircase structure below the top region and below the first region, the second precut etch stop layer including the fourth etch stop layer and the fifth etch stop layer and not the first etch stop layer, the second etch stop layer or the third etch stop layer. 
 
     
     
       5. The apparatus of  claim 1 , wherein the staircase etch stop layer is further disposed on regions of the apparatus beyond the staircase structure. 
     
     
       6. The apparatus of  claim 5 , wherein the staircase etch stop layer is disposed on at least one of a region on the substrate beyond the staircase structure and a region on the plurality of word lines. 
     
     
       7. A method of forming a memory array including:
 forming a plurality of word lines to define a staircase structure on a substrate; 
 forming a staircase etch stop layer including:
 forming a sandwich etch stop layer disposed on the staircase structure and including a first etch stop layer and a third etch stop layer made of a first material, and a second etch stop layer sandwiched between the first etch stop layer and the third etch stop layer and made of a second material having etch properties different from those of the first material; 
 etching the sandwich etch stop layer including removing the first etch stop layer to form a precut etch stop layer at a region of the staircase structure below a top region of the staircase structure, the precut etch stop layer including the second etch stop layer and the third etch stop layer, etching further including leaving the sandwich etch stop layer at the top region the staircase structure, wherein the staircase etch stop layer includes the staircase etch stop layer and the precut etch stop layer; 
 
 forming a dielectric layer on the staircase etch stop layer; 
 etching vias through the dielectric layer and the staircase etch stop layer to land on the word lines at the staircase structure; and 
 filling the vias with a conductive material to form contact structures extending through the dielectric layer and the staircase etch stop layer and landing on the word lines at the staircase structure. 
 
     
     
       8. The method of  claim 7 , wherein etching vias includes:
 performing a first etch process to etch the vias to land on the staircase etch stop layer at the top region of the staircase structure, and to land on the second etch stop layer at the region of the staircase structure below the top region; and 
 performing a second etch process to extend the vias to land on the word lines. 
 
     
     
       9. The method of  claim 7 , wherein the staircase etch stop layer includes an underlying etch stop layer disposed between the staircase structure and the staircase etch stop layer. 
     
     
       10. The method of  claim 7 , wherein the first material includes a nitride, and the second material includes an oxide. 
     
     
       11. The method of  claim 8 , wherein performing the first etch process includes depositing a photoresist layer on the staircase structure to cover the top region of the staircase structure and such that the region of the staircase structure below the top region is not covered by the photoresist layer, depositing the photoresist layer being prior to etching the vias. 
     
     
       12. The method of  claim 11 , wherein the top region of the staircase structure ends at a word line below which a thickness of the first material remaining, after a hypothetical etch process of the first material had the staircase etch stop layer included the first etch stop layer as a single layer of the first material, is above a threshold, the threshold based on a maximum thickness of the first material that would substantially avoid an underetch resulting from the first etch process. 
     
     
       13. The method of  claim 7 , wherein:
 the sandwich etch stop layer further includes a fourth etch stop layer made of the second material, and a fifth etch stop layer made of the first material, the fourth etch stop layer between the third etch stop layer and the fifth etch stop layer; 
 the precut etch stop layer is a first precut etch stop layer and the region of the staircase structure below the top region is a first region of the staircase structure below the top region; and 
 etching the sandwich etch stop layer further includes, after removing the first etch stop layer, removing the second etch stop layer and the third etch stop layer to form a second precut etch stop layer at a second region of the staircase structure below the top region and below the first region, the second precut etch stop layer including the fourth etch stop layer and the fifth etch stop layer, wherein the staircase etch stop layer includes the staircase etch stop layer, the first precut etch stop layer and the second precut etch stop layer. 
 
     
     
       14. The method of  claim 7 , wherein the staircase etch stop layer is further disposed on regions of the memory array beyond the staircase structure. 
     
     
       15. The method of  claim 14 , wherein the staircase etch stop layer is disposed on at least one of a region on the substrate beyond the staircase structure and a region on the plurality of word lines. 
     
     
       16. A system including:
 a controller including one or more processors; and 
 a memory device coupled to the controller and including:
 a substrate including control circuitry therein; 
 a memory array electrically coupled to the control circuitry and including a plurality of word lines disposed to define a staircase structure, and a staircase etch stop layer including:
 a sandwich etch stop layer disposed on a top region the staircase structure furthest from the substrate and including a first etch stop layer and a third etch stop layer made of a first material, and a second etch stop layer sandwiched between the first etch stop layer and the third etch stop layer and made of a second material having etch properties different from those of the first material; and 
 a precut etch stop layer disposed at a region of the staircase structure below the top region and including the second etch stop layer and the third etch stop layer and not the first etch stop layer; 
 a dielectric layer on the staircase etch stop layer; and 
 contact structures extending through the dielectric layer and the staircase etch stop layer and landing on the word lines at the staircase structure. 
 
 
 
     
     
       17. The system of  claim 16 , wherein the staircase etch stop layer includes an underlying etch stop layer disposed between the staircase structure and the staircase etch stop layer. 
     
     
       18. The system of  claim 16 , wherein the first material includes a nitride, and the second material includes an oxide. 
     
     
       19. The system of  claim 16 , wherein:
 the sandwich etch stop layer further includes a fourth etch stop layer made of the second material, and a fifth etch stop layer made of the first material, the fourth etch stop layer between the third etch stop layer and the fifth etch stop layer; and 
 the precut etch stop layer is a first precut etch stop layer, and the region of the staircase structure below the top region is a first region of the staircase structure below the top region, wherein the staircase etch stop layer further includes a second precut etch stop layer disposed at a second region of the staircase structure below the top region and below the first region, the second precut etch stop layer including the fourth etch stop layer and the fifth etch stop layer and not the first etch stop layer, the second etch stop layer or the third etch stop layer. 
 
     
     
       20. The system of  claim 16 , wherein the staircase etch stop layer is further disposed on regions of the memory array beyond the staircase structure. 
     
     
       21. The system of  claim 16 , wherein the staircase etch stop layer is disposed on at least one of a region on the substrate beyond the staircase structure and a region on the plurality of word lines.

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