US12433025B2ActiveUtilityA1

Display panel and display apparatus including dummy conductive pattern

70
Assignee: INNOLUX CORPPriority: Aug 16, 2021Filed: Jul 22, 2022Granted: Sep 30, 2025
Est. expiryAug 16, 2041(~15.1 yrs left)· nominal 20-yr term from priority
H10D 86/441H10D 86/481H10D 86/60H10K 59/88H10K 59/131
70
PatentIndex Score
0
Cited by
15
References
20
Claims

Abstract

A display panel and a display apparatus are disclosed. The display apparatus includes the display panel and a sensing device. The display panel includes a substrate, a first signal line, and a first dummy conductive pattern. The substrate includes a functional display region, a buffer region, and a general display region. The buffer region is located between the functional display region and the general display region. The first signal line and the first dummy conductive pattern are disposed on the substrate and correspond to the buffer region. The first dummy conductive pattern is overlapped with a part of the first signal line. The sensing device is overlapped with the functional display region.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A display panel comprising:
 a substrate comprising a functional display region, a buffer region, and a general display region, wherein the buffer region is located between the functional display region and the general display region; 
 a first signal line disposed on the substrate and corresponding to the buffer region; and 
 a first dummy conductive pattern disposed on the substrate and corresponding to the buffer region, wherein the first dummy conductive pattern is overlapped with a part of the first signal line. 
 
     
     
       2. The display panel according to  claim 1 , further comprising:
 a logic gate disposed on the substrate and corresponding to the buffer region, wherein the logic gate is electrically connected to the first signal line. 
 
     
     
       3. The display panel according to  claim 2 , wherein the logic gate comprises an inverter, and the first signal line comprises a gate line. 
     
     
       4. The display panel according to  claim 2 , wherein the logic gate comprises a transmission gate circuit, and the first signal line comprises a data line. 
     
     
       5. The display panel according to  claim 4 , wherein the transmission gate circuit comprises a p-type metal-oxide-semiconductor field-effect transistor, an n-type metal-oxide-semiconductor field-effect transistor, or a combination thereof. 
     
     
       6. The display panel according to  claim 1 , wherein the substrate further comprises a peripheral region, wherein the peripheral region surrounds the general display region, and the display panel further comprises:
 a transmission gate circuit disposed on the substrate and corresponding to the peripheral region, wherein the transmission gate circuit is electrically connected to the first signal line. 
 
     
     
       7. The display panel according to  claim 6 , wherein the first signal line comprises a data line. 
     
     
       8. The display panel according to  claim 1 , wherein the first dummy conductive pattern extends according to the part of the first signal line. 
     
     
       9. The display panel according to  claim 1 , wherein the first signal line further corresponds to the functional display region and the general display region, and the display panel further comprises:
 a second signal line disposed on the substrate and corresponding to the buffer region and the general display region; and 
 a second dummy conductive pattern disposed on the substrate and corresponding to the buffer region, wherein the second dummy conductive pattern is overlapped with a part of the second signal line. 
 
     
     
       10. The display panel according to  claim 9 , wherein the second dummy conductive pattern extends according to the part of the second signal line, and the second dummy conductive pattern and the first dummy conductive pattern have different lengths. 
     
     
       11. A display apparatus comprising:
 a display panel comprising:
 a substrate comprising a functional display region, a buffer region, and a general display region, wherein the buffer region is located between the functional display region and the general display region; 
 a first signal line disposed on the substrate and corresponding to the buffer region; and 
 a first dummy conductive pattern disposed on the substrate and corresponding to the buffer region, wherein the first dummy conductive pattern is overlapped with a part of the first signal line; and 
 
 a sensing device overlapped with the functional display region. 
 
     
     
       12. The display apparatus according to  claim 11 , wherein the display panel further comprises:
 a logic gate disposed on the substrate and corresponding to the buffer region, wherein the logic gate is electrically connected to the first signal line. 
 
     
     
       13. The display apparatus according to  claim 12 , wherein the logic gate comprises an inverter, and the first signal line comprises a gate line. 
     
     
       14. The display apparatus according to  claim 12 , wherein the logic gate comprises a transmission gate circuit, and the first signal line comprises a data line. 
     
     
       15. The display apparatus according to  claim 14 , wherein the transmission gate circuit comprises a p-type metal-oxide-semiconductor field-effect transistor, an n-type metal-oxide-semiconductor field-effect transistor, or a combination thereof. 
     
     
       16. The display apparatus according to  claim 11 , wherein the substrate further comprises a peripheral region, wherein the peripheral region surrounds the general display region, and the display panel further comprises:
 a transmission gate circuit disposed on the substrate and corresponding to the peripheral region, wherein the transmission gate circuit is electrically connected to the first signal line. 
 
     
     
       17. The display apparatus according to  claim 16 , wherein the first signal line comprises a data line. 
     
     
       18. The display apparatus according to  claim 11 , wherein the first dummy conductive pattern extends according to the part of the first signal line. 
     
     
       19. The display apparatus according to  claim 11 , wherein the first signal line further corresponds to the functional display region and the general display region, and the display panel further comprises:
 a second signal line disposed on the substrate and corresponding to the buffer region and the general display region; and 
 a second dummy conductive pattern disposed on the substrate and corresponding to the buffer region, wherein the second dummy conductive pattern is overlapped with a part of the second signal line. 
 
     
     
       20. The display apparatus according to  claim 19 , wherein the second dummy conductive pattern extends according to the part of the second signal line, and the second dummy conductive pattern and the first dummy conductive pattern have different lengths.

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