Pixel and display device including the same

Abstract

A pixel includes: a first transistor including first, second, and gate electrodes, which are respectively connected to first, second, and third nodes; a second transistor connected between a data line and the third node, the second transistor including a gate electrode electrically connected to a first scan line; a third transistor connected between a first power line to which a voltage of a first driving power source is supplied and the first node, the third transistor including a gate electrode electrically connected to an emission control line; a first capacitor connected between the first and third nodes; a second capacitor connected between the second and third nodes; a third capacitor connected between the third node and a second power line to which a voltage of a second driving power source is supplied; and a light emitting element connected between the second node and the second power line.

What is claimed is: 
     
       1. A pixel comprising:
 a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node; 
 a second transistor connected between a data line and the third node, the second transistor including a gate electrode electrically connected to a first scan line; 
 a third transistor connected between a first power line to which a voltage of a first driving power source is supplied and the first node, the third transistor including a gate electrode electrically connected to an emission control line; 
 a first capacitor connected between the first node and the third node; 
 a second capacitor connected between the second node and the third node; 
 a third capacitor connected between the third node and a second power line to which a voltage of a second driving power source is supplied; and 
 a light emitting element connected between the second node and the second power line. 
 
     
     
       2. The pixel of  claim 1 , further comprising a fourth transistor including a first electrode connected to the second node, a second electrode electrically connected to a third power line to which a voltage of an initialization power source is supplied, and a gate electrode electrically connected to a second scan line. 
     
     
       3. The pixel of  claim 2 , wherein the light emitting element is turned off when the voltage of the initialization power source is supplied to the second node. 
     
     
       4. The pixel of  claim 2 , wherein each of the first transistor to the fourth transistor is a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) including a body electrode. 
     
     
       5. The pixel of  claim 4 , wherein the voltage of the first driving power source is supplied to the body electrode of each of the first transistor to the fourth transistor. 
     
     
       6. The pixel of  claim 2 , wherein one horizontal period includes a first period, a second period, and a third period,
 wherein, during the first period, the second transistor, the third transistor, and the fourth transistor are set to be in a turn-on state, 
 wherein, during the second period, the second transistor and the fourth transistor are set to be in the turn-on state, and the third transistor is set to be in a turn-off state, and 
 wherein, during the third period, the third transistor and the fourth transistor are set to be in the turn-on state, and the second transistor is set to be in the turn-off state. 
 
     
     
       7. The pixel of  claim 6 , wherein a voltage of a data signal is supplied to the data line during the first period to the third period. 
     
     
       8. A pixel comprising:
 a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node; 
 a second transistor connected between a data line and the third node, the second transistor including a gate electrode electrically connected to a first scan line; 
 a third transistor connected between a first power line to which a voltage of a first driving power source is supplied and the first node, the third transistor including a gate electrode electrically connected to an emission control line; 
 a first capacitor connected between the first node and the third node; 
 a second capacitor connected between the second node and the third node; 
 a third capacitor connected between the third node and the first power line; and 
 a light emitting element connected between the second node and a second power line to which a voltage of a second driving power source is supplied. 
 
     
     
       9. The pixel of  claim 8 , wherein the third capacitor is supplied with the voltage of the first driving power source through the first power line. 
     
     
       10. The pixel of  claim 8 , further comprising a fourth transistor including a first electrode connected to the second node, a second electrode electrically connected to a third power line to which a voltage of an initialization power source is supplied, and a gate electrode electrically connected to a second scan line. 
     
     
       11. The pixel of  claim 10 , wherein the light emitting element is turned off when the voltage of the initialization power source is supplied to the second node. 
     
     
       12. The pixel of  claim 10 , wherein each of the first transistor to the fourth transistor is a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) including a body electrode, and the voltage of the first driving power source is supplied to the body electrode of each of the first transistor to the fourth transistor. 
     
     
       13. The pixel of  claim 10 , wherein one horizontal period includes a first period, a second period, and a third period,
 wherein, during the first period, the second transistor, the third transistor, and the fourth transistor are set to be in a turn-on state, 
 wherein, during the second period, the second transistor and the fourth transistor are set to be in the turn-on state, and the third transistor is set to be in a turn-off state, 
 wherein, during the third period, the third transistor and the fourth transistor are set to be in the turn-on state, and the second transistor is set to be in the turn-off state, and 
 wherein a voltage of a data signal is supplied to the data line during the first period to the third period. 
 
     
     
       14. A display device comprising:
 pixels connected to write scan lines, initialization scan lines, data lines, and emission control lines, 
 wherein a pixel located on an ith pixel row, where i is an integer of 0 or more, and a jth pixel column, where j is an integer of 0 or more, includes: 
 a first transistor including a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node; 
 a second transistor connected between a jth data line among the data lines and the third node, the second transistor being turned on when a first scan signal is supplied to a first scan line among the write scan lines; 
 a third transistor connected between a first power line to which a voltage of a first driving power source is supplied and the first node, the third transistor being turned off when an emission control signal is supplied to a kth emission control line, where k is an integer of 0 or more; 
 a first capacitor connected between the first node and the third node; 
 a second capacitor connected between the second node and the third node; 
 a third capacitor connected to the third node; and 
 a light emitting element connected between the second node and a second power line to which a voltage of a second driving power source is supplied. 
 
     
     
       15. The display device of  claim 14 , wherein the third capacitor is connected between the third node and a power line. 
     
     
       16. The display device of  claim 15 , wherein the power line is the first power line or the second power line. 
     
     
       17. The display device of  claim 14 , wherein the pixel located on the ith pixel row and the jth pixel column further includes a fourth transistor including a first electrode connected to the second node and a second electrode electrically connected to a third power line to which a voltage of an initialization power source is supplied, the fourth transistor being turned on when a second scan signal is supplied to a second scan line among the initialization scan lines. 
     
     
       18. The display device of  claim 17 , wherein each of the first transistor to the fourth transistor is a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) including a body electrode, and the voltage of the first driving power source is supplied to the body electrode of each of the first transistor to the fourth transistor.