US12445114B1ActiveUtility

Intelligent power noise reduction

57
Assignee: AMAZON TECH INCPriority: Sep 6, 2023Filed: Sep 6, 2023Granted: Oct 14, 2025
Est. expirySep 6, 2043(~17.2 yrs left)· nominal 20-yr term from priority
H03H 11/04G06N 3/08H03H 2011/0488G06F 1/28
57
PatentIndex Score
0
Cited by
27
References
19
Claims

Abstract

Techniques for improving power integrity when executing a workload on an integrated circuit device may include applying a preset configuration to a power distribution network of the integrated circuit device for the workload being executed. A power distribution network controller can monitor a voltage noise level and/or a bit error rate of the integrated circuit device. Active filtering components of the power distribution network can be dynamically adjusted to keep the integrated circuit device within a voltage noise target and/or a bit error rate target.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for performing power noise reduction for an integrated circuit device, the method comprising:
 executing a plurality of workloads on the integrated circuit device; 
 for each of the plurality of workloads, optimizing configuration of a power distribution network having active filtering components to meet a voltage noise target and a bit error rate target to derive a filtering configuration; 
 selecting the filtering configuration for a highest power consumption workload of the plurality of workloads to use as a preset configuration of the power distribution network for the plurality of workloads; and 
 subsequent to deriving the preset configuration of the power distribution network:
 executing a workload that belongs to the plurality of workloads on the integrated circuit device; 
 applying the preset configuration of the power distribution network for the workload being executed; 
 monitoring a voltage noise level and a bit error rate of the integrated circuit device; and 
 dynamically adjusting the power distribution network and operating conditions for the workload to keep the integrated circuit device within the voltage noise target and the bit error rate target. 
 
 
     
     
       2. The method of  claim 1 , wherein optimizing the configuration of the power distribution network includes training a neural network model to generate the preset configuration for the workload. 
     
     
       3. The method of  claim 1 , wherein adjusting the power distribution network includes adjusting the active filtering components including one or more of a varactor, an active voltage regulator, an active low-pass filter, an active notch filter, or an adaptive noise cancellation circuit. 
     
     
       4. The method of  claim 1 , wherein adjusting the operating conditions of the workload includes adjusting an operating frequency of the integrated circuit device, adjusting an operating voltage of the integrated circuit device, adjusting a current limit of the integrated circuit device, or adjusting a number of active blocks in the integrated circuit device. 
     
     
       5. A method comprising:
 executing a workload on an integrated circuit device; 
 applying a preset configuration to a power distribution network of the integrated circuit device for the workload being executed; 
 monitoring a bit error rate of the integrated circuit device; and 
 dynamically adjusting active filtering components of the power distribution network to keep the integrated circuit device within a bit error rate target, 
 wherein the preset configuration of the power distribution network is derived by:
 executing a plurality of workloads on the integrated circuit device; 
 for each of the plurality of workloads:
 operating the integrated circuit device at a target frequency; and 
 optimizing a configuration of the power distribution network to meet the bit error rate target; and 
 
 selecting the configuration for a highest power consumption workload of the plurality of workloads to use as the preset configuration for the power distribution network, the preset configuration being used for each workload in the plurality of workloads. 
 
 
     
     
       6. The method of  claim 5 , wherein different groups of plurality of workloads have different preset configurations for the power distribution network. 
     
     
       7. The method of  claim 5 , wherein optimizing the configuration of the power distribution network includes iteratively adjusting the target frequency of the integrated circuit device to find a maximum allowable target frequency for the workload. 
     
     
       8. The method of  claim 5 , wherein optimizing the configuration of the power distribution network includes training a neural network model to generate the preset configuration for the workload. 
     
     
       9. The method of  claim 5 , wherein the preset configuration of the power distribution network includes settings for the active filtering components including one or more of a varactor, an active voltage regulator, an active low-pass filter, an active notch filter, or an adaptive noise cancellation circuit. 
     
     
       10. The method of  claim 5 , further comprising adjusting operating conditions for the workload. 
     
     
       11. The method of  claim 10 , wherein adjusting the operating conditions for the workload includes adjusting an operating frequency of the integrated circuit device, adjusting an operating voltage of the integrated circuit device, adjusting a current limit of the integrated circuit device, or adjusting a number of active blocks in the integrated circuit device. 
     
     
       12. The method of  claim 5 , further comprising:
 monitoring a voltage noise level of the integrated circuit device; and 
 dynamically adjusting the active filtering components of the PDN to keep the integrated circuit device within a voltage noise target. 
 
     
     
       13. An integrated circuit device comprising:
 a power distribution network (PDN) including active filtering components; 
 a plurality of functional circuit blocks; 
 and 
 a PDN controller operable to:
 apply a preset configuration of the PDN for a workload being executed by the integrated circuit device; 
 monitor bit error rates of the plurality of functional circuit blocks; and 
 dynamically adjust the active filtering components of the PDN to keep the integrated circuit device within a bit error rate target, 
 
 wherein the preset configuration is derived by:
 executing a plurality of workloads on the integrated circuit device; 
 for each of the plurality of workloads, optimizing a configuration of the PDN to meet the bit error rate target; and 
 selecting the configuration for a highest power consumption workload of the plurality of workloads to use as the preset configuration for the PDN, the preset configuration being used for the plurality of workloads. 
 
 
     
     
       14. The integrated circuit device of  claim 13 , wherein dynamic adjustment of the active filtering components includes adjusting a target voltage of a voltage regulator. 
     
     
       15. The integrated circuit device of  claim 13 , wherein dynamic adjustment of the active filtering components includes adjusting an input voltage to a varactor. 
     
     
       16. The integrated circuit device of  claim 13 , wherein the PDN controller is further operable to reduce an operating frequency or an operating voltage of the integrated circuit device when the voltage noise target or the bit error rate target is not met after adjusting the active filtering components. 
     
     
       17. The integrated circuit device of  claim 13 , wherein different groups of workloads have different preset configurations. 
     
     
       18. The integrated circuit device of  claim 13 , further comprising a plurality of voltage noise sensing circuits placed at a respective power sensitive location of the integrated circuit device. 
     
     
       19. The integrated circuit device of  claim 18 , wherein the PDN controller is operable to:
 monitor voltage noise sensed by the plurality of voltage noise sensing circuits; and 
 dynamically adjust the active filtering components of the PDN to keep the integrated circuit device within a voltage noise target.

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