Memory device supporting word line holding operation and operating method of the same

Abstract

A memory device including: a memory device may include: a memory cell array, and a controller configured to perform program loops each comprising a voltage application operation, a word line holding operation, and a verification operation until a program operation for selected memory cells is successful, during the word line holding operation, apply a holding pass voltage having a higher level than a ground voltage to each of first word lines having a program state and second word lines having an erase state, which belong to unselected word lines among a plurality of word lines, during the verification operation, apply a verification pass voltage having a higher level than the holding pass voltage to K word lines that belong to the first word lines and the second word lines, and apply the holding pass voltage to remaining word lines except the K word lines, among the second word lines.

What is claimed is: 
     
       1. A memory device comprising:
 a memory cell array comprising a plurality of cell strings that are connected between a plurality of bit lines and a common source line and a plurality of word lines that are connected to the plurality of cell strings; and 
 a controller configured to
 perform program loops each comprising a voltage application operation, a word line holding operation, and a verification operation until a program operation for selected memory cells corresponding to a selected word line and a selected cell string is successful, 
 during the word line holding operation, apply a holding pass voltage having a higher level than a ground voltage to each of first word lines having a program state and second word lines having an erase state, which belong to unselected word lines among the plurality of word lines, 
 during the verification operation, apply a verification pass voltage having a higher level than the holding pass voltage to K word lines that belong to the first word lines and the second word lines, and apply the holding pass voltage to remaining word lines except the K word lines, among the second word lines, 
 
 wherein K is an integer equal to or greater than 0. 
 
     
     
       2. The memory device of  claim 1 , wherein the controller is configured to
 apply, during the word line holding operation, a holding voltage having a level equal to or higher than a holding pass voltage to the selected word line, and 
 apply, during the verification operation, a verification voltage to the selected word line. 
 
     
     
       3. The memory device of  claim 1 , wherein the controller is configured to classify the unselected word line into the first word lines and the second word lines based on a set word line programming sequence. 
     
     
       4. The memory device of  claim 1 , wherein the controller is configured to classify, as the K word lines, a set number of word lines that belong to the second word lines and that are physically adjacent to the selected word line. 
     
     
       5. The memory device of  claim 2 , wherein the controller comprises:
 a voltage generator configured to generate the holding pass voltage, the holding voltage, the verification voltage, and the verification pass voltage in response to a generation control signal; 
 an address decoder configured to
 classify the plurality of word lines into the selected word line and the first and second word lines, 
 transfer one of the holding voltage and the verification voltage to the selected word line in response to a transfer control signal, 
 transfer one of the holding pass voltage and the verification pass voltage to the first word lines and the K word lines, and 
 transfer the holding pass voltage to the remaining word lines; and 
 
 a control logic configured to generate the generation control signal and the transfer control signal in response to an address and command that are externally applied. 
 
     
     
       6. The memory device of  claim 5 , wherein, during the word line holding operation, the control logic is configured to set values of the generation control signal and the transfer control signal so that the voltage generator generates the holding pass voltage and the holding voltage, and the address decoder transfers the holding voltage to the selected word line and transfers the holding pass voltage to each of the first and second word lines. 
     
     
       7. The memory device of  claim 5 , wherein, during the verification operation, the control logic is configured to set values of the generation control signal and the transfer control signal so that the voltage generator generates the holding pass voltage, the verification voltage, and the verification pass voltage, and the address decoder transfers the verification voltage to the selected word line, transfers the verification pass voltage to the first word lines and the K word lines, and transfers the holding pass voltage to the remaining word lines. 
     
     
       8. An operating method of a memory device comprising a plurality of cell strings that are connected between a plurality of bit lines and a common source line and a plurality of word lines that are connected to the plurality of cell strings, the operating method comprising:
 performing program loops each comprising a voltage application operation, a word line holding operation, and a verification operation until a program operation for selected memory cells corresponding to a selected word line and a selected cell string is successful; 
 classifying the plurality of word lines into the selected word line and an unselected word line and classifying the unselected word line into first word lines having a program state and second words line having an erase state; 
 during the word line holding operation, applying a holding pass voltage to each of the first and second word lines and applying a holding voltage having a level higher than or equal to the holding pass voltage to the selected word line; and 
 during the verification operation, applying a verification voltage to the selected word line, applying a verification pass voltage having a level higher than the holding pass voltage to the K word lines that belong to the first word lines and the second word lines, and applying the holding pass voltage to remaining word lines except the K word lines, among the second word lines, 
 wherein K is an integer equal to or greater than 0. 
 
     
     
       9. The operating method of  claim 8 , wherein the classifying of the unselected word line comprises classifying the unselected word line into the first word lines and the second word lines based on a set word line programming sequence. 
     
     
       10. The operating method of  claim 8 , further comprising classifying, as the K word lines, a set number of word lines that belong to the second word lines and that are physically adjacent to the selected word line.