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US12498643B2ActiveUtilityPatentIndex 37

Fabrication of microscale structures

Assignee: AUTHENTIX INCPriority: Jan 12, 2023Filed: Jan 12, 2024Granted: Dec 16, 2025
Est. expiryJan 12, 2043(~16.5 yrs left)· nominal 20-yr term from priority
Inventors:KHOSHNEGAR SHAHRESTANI MILADDEY RIPON
H01J 37/32449G03F 7/30G03F 7/0005H01J 2237/3341H01J 37/32082G03F 7/40G03F 7/704
37
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Cited by
5
References
20
Claims

Abstract

A method for patterning a substrate involves depositing a layer of resist material on a surface of the substrate, lithographically patterning (electron beam exposing and then developing) the layer of the resist material to form a patterned resist layer having a pattern multi-faceted microscale structures with a depth profile that varies over an area of the layer of resist material, and using the patterned resist layer in an etching step to transfer the pattern of multi-faceted microscale structures from the patterned resist layer to the substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for patterning a substrate, comprising:
 depositing a layer of resist material on a surface of the substrate, the substrate comprising a substrate material;   lithographically patterning the layer of the resist material to provide a patterned resist layer having a pattern with a depth profile that varies over an area of the layer of resist material, the lithographic patterning comprising:
 exposing the layer of the resist material to an electron beam while varying an energy of the electron beam over the area in a pattern that corresponds to the depth profile to provide an exposed resist layer; and 
 developing the exposed resist layer to selectively remove resist material from the exposed resist layer to form the patterned resist layer; 
   etching the patterned resist layer and the substrate by exposing the patterned resist layer and the substrate to a plasma under conditions sufficient to transfer the pattern of the patterned resist layer to the substrate by removing substrate material from the substrate to form a patterned substrate having a depth profile corresponding to the depth profile of the patterned resist layer, thereby providing a patterned substrate; and   between lithographically patterning and etching, exposing the patterned resist to a thermal reflow process comprising elevating a temperature of the substrate and the patterned resist material above a glass transition temperature of the patterned resist material and below a glass transition temperature of the substrate.   
     
     
         2 . The method of  claim 1 , wherein the depth profile of the patterned substrate has a maximum dimension that is greater than the maximum dimension of the depth profile of the patterned resist layer. 
     
     
         3 . The method of  claim 1 , wherein the maximum dimension of the depth profile of the patterned substrate is in a range from 1 micron to 20 microns, and wherein the pattern comprises a periodic pattern, or a non-periodic pattern. 
     
     
         4 . The method of  claim 2 , wherein the depth profile of the patterned substrate is scaled to the depth profile of the patterned resist layer by a selectivity value, which is greater than 1. 
     
     
         5 . The method of  claim 1 , wherein lithographically patterning the layer of resist material comprises applying grey-scale electron beam lithography, laser direct-write lithography, or greyscale photolithography. 
     
     
         6 . The method of  claim 5 , wherein the lithographically patterning the layer of resist material comprises scanning an electron beam over a plurality of steps, each step having a step size, and the electron beam size having greatest dimension at least 5 times greater than the beam step size during rastering. 
     
     
         7 . The method of  claim 1 , wherein the temperature of the substrate and the patterned resist material is in a range from 120° C. to 140° C. 
     
     
         8 . The method of  claim 1 , wherein a roughness of the patterned resist layer, following the thermal reflow process, is less than an RMS roughness of 100 nanometers. 
     
     
         9 . The method of any  claim 1 , wherein exposing the patterned resist layer and the substrate to a plasma comprises:
 providing a first gas and a second gas to a process chamber at a first flow rate and a second flow rate, respectively; and   applying an RF power in the process chamber to generate the plasma.   
     
     
         10 . The method of  claim 9 , wherein the first gas or the second gas comprise molecular oxygen, sulfur hexafluoride, or octafluorocyclobutane. 
     
     
         11 . The method of  claim 9 , wherein the first flow rate and the second flow rate are in a range from 60 sccm to 90 sccm. 
     
     
         12 . The method of  claim 1 , wherein the exposing the layer of the resist material to an electron beam comprises varying an RF power of the electron beam in a range from 60 Watts to 160 Watts. 
     
     
         13 . The method of  claim 1 , further comprising:
 chilling, during the exposing the patterned resist layer and the substrate to a plasma, the patterned resist layer and the substrate below a temperature threshold.   
     
     
         14 . A method for patterning a substrate, comprising:
 depositing a layer of resist material on a surface of the substrate, the substrate comprising a substrate material;   lithographically patterning the layer of the resist material to form a patterned resist layer, wherein the patterned resist layer has a pattern with a depth profile that varies over an area of the layer of resist material, the lithographic patterning comprising:
 exposing the layer of the resist material to an electron beam while varying an energy of the electron beam over the area in a pattern that corresponds to the depth profile to form an exposed resist layer; and 
 selectively removing the exposed resist layer to form the patterned resist layer, wherein the patterned resist layer comprises a plurality of resist microstructures, wherein each resist microstructure comprises a plurality of resist facets, wherein each resist facet has a slope, and wherein the energy of the electron beam is varied in the exposing step so that the resist facets have predetermined different slopes, and 
   using the patterned resist layer in an etching step to transfer the pattern of the patterned resist layer to the substrate, wherein the etching step involves exposing the patterned resist layer and the substrate to a plasma to form a pattern in the substrate, wherein the pattern in the substrate has a depth profile corresponding to the depth profile of the patterned resist layer, wherein the pattern in the substrate comprises a plurality of substrate microstructures, wherein each substrate microstructure has a plurality of substrate facets, wherein there is a one-to-one relationship between resist microstructures of the patterned resist layer and substrate microstructures of the substrate, wherein at least one of the substrate microstructures is less than 250 square microns in area and comprises at least 50 substrate facets.   
     
     
         15 . The method of  claim 14 , further comprising:
 transferring the pattern in the substrate to a layer of a thermoplastic material thereby forming an optical security structure.   
     
     
         16 . The method of  claim 4 , wherein the selectivity value ranges from about 9-24. 
     
     
         17 . A method for patterning a substrate, comprising:
 depositing a layer of resist material on a surface of the substrate, the substrate comprising a substrate material;   lithographically patterning the layer of the resist material to provide a patterned resist layer having a pattern with a depth profile that varies over an area of the layer of resist material, the lithographic patterning comprising:
 exposing the layer of the resist material to an electron beam while varying an energy of the electron beam over the area in a pattern that corresponds to the depth profile to provide an exposed resist layer; and 
 selectively removing the exposed resist layer to form the patterned resist layer, wherein the patterned resist layer comprises a plurality of resist microstructures, wherein each resist microstructure comprises a plurality of resist facets, wherein each resist facet has a slope, and wherein the energy of the electron beam is varied in the exposing step so that the resist facets have predetermined slopes; and 
   using the patterned resist layer in an etching step to transfer the pattern of the patterned resist layer to the substrate, wherein the etching step involves exposing the patterned resist layer and the substrate to a plasma to form a pattern in the substrate, wherein the pattern in the substrate has a depth profile corresponding to the depth profile of the patterned resist layer, wherein the pattern in the substrate comprises a plurality of substrate microstructures, wherein each substrate microstructure has a plurality of substrate facets, wherein there is a one-to-one relationship between resist microstructures of the patterned resist layer and substrate microstructures of the substrate.   
     
     
         18 . The method of  claim 17 , further comprising:
 between lithographically patterning and using the patterned resist layer in an etching step, exposing the patterned resist to a thermal reflow process comprising elevating a temperature of the substrate and the patterned resist material above a glass transition temperature of the patterned resist material and below a glass transition temperature of the substrate.   
     
     
         19 . The method of  claim 17 , wherein:
 the depth profile of the patterned substrate has a maximum dimension that is greater than the maximum dimension of the depth profile of the patterned resist layer;   the depth profile of the patterned substrate is scaled to the depth profile of the patterned resist layer by a selectivity value; and   the selectivity value is from about 9 to about 24.   
     
     
         20 . The method of  claim 17 , wherein the etching step comprises dry etching using deep reactive ion etching.

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