US12498922B2ActiveUtilityA1

Quantum computing platform adaptation method and apparatus, and quantum computer operating system

60
Assignee: ORIGIN QUANTUM COMPUTING TECHNOLOGY HEFEI CO LTDPriority: Apr 21, 2021Filed: Oct 20, 2023Granted: Dec 16, 2025
Est. expiryApr 21, 2041(~14.8 yrs left)· nominal 20-yr term from priority
G06N 10/20G06N 10/80G06F 8/76G06N 10/40
60
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19
Claims

Abstract

A quantum computing platform adaptation method and apparatus, and a quantum computer operating system are provided. The method includes: acquiring a quantum program to be executed and a topological structure of a quantum chip corresponding to a quantum computing platform, wherein the topological structure is configured to represent physical qubits in an electronic device and a connection relationship between the physical qubits; and adapting the quantum program to the quantum computing platform based on the topological structure. According to some embodiments of the present disclosure, scalability of the quantum program can be improved, so that the quantum program can be adapted to different quantum computing platforms and run on different quantum chips.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A quantum computing platform adaptation method, comprising:
 acquiring a quantum program to be executed and a topological structure of a quantum chip corresponding to a quantum computing platform, wherein the topological structure is configured to represent physical qubits in an electronic device and a connection relationship between the physical qubits; and   adapting the quantum program to the quantum computing platform based on the topological structure,   wherein the adapting the quantum program to the quantum computing platform based on the topological structure comprises:
 determining N sets of isomorphic subgraphs corresponding to N maximum subgraphs of the quantum program, wherein the N maximum subgraphs are determined based on a directed acyclic graph of the quantum program, the N sets of isomorphic subgraphs constitute a bit relation graph on the quantum chip obtained by mapping the N maximum subgraphs based on the topological structure of the quantum chip in the electronic device, and N is an integer greater than or equal to 1; and 
 determining a fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs and an exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs, and constructing a quantum circuit based on the fixed cost and the exchange cost, wherein the fixed cost is determined based on the quantum logic gate corresponding to the isomorphic subgraph, and the exchange cost is determined based on SWAP gates required for conversion between quantum logic gates corresponding to the isomorphic subgraphs. 
   
     
     
         2 . The method according to  claim 1 , wherein the adapting the quantum program to the quantum computing platform based on the topological structure comprises:
 constructing a first directed acyclic graph of the quantum program;   traversing the first directed acyclic graph to obtain a maximum subgraph sequence, the maximum subgraph sequence comprises N maximum subgraphs, and N is an integer greater than or equal to 1;   determining isomorphic subgraphs of the N maximum subgraphs in the topological structure to obtain N sets of isomorphic subgraphs, the N sets of isomorphic subgraphs being in one-to-one correspondence to the N maximum subgraphs; and   constructing the quantum circuit based on the N sets of isomorphic subgraphs, wherein the quantum circuit is configured to operate on the quantum computing platform.   
     
     
         3 . The method according to  claim 2 , wherein the constructing the first directed acyclic graph of the quantum program comprises:
 acquiring quantum logic gates of the quantum program; and   constructing the first directed acyclic graph based on the quantum logic gates, wherein the first directed acyclic graph comprises nodes and directed edges; the nodes comprise two points and an edge, the two points are configured to represent two logical qubits corresponding to the quantum logic gate, and the edge is configured to represent the quantum logic gate acting on the two logical qubits; and the directed edges are configured to represent dependence of the quantum logic gate based on a quantum state evolution time sequence of logical qubits.   
     
     
         4 . The method according to  claim 3 , wherein the quantum logic gates comprise multi-quantum logic gates; and the constructing the first directed acyclic graph based on the quantum logic gates comprises:
 converting the multi-quantum logic gate into a single-quantum logic gate and a two-quantum logic gate; and   deleting the single-quantum logic gate, and constructing the first directed acyclic graph based on the two-quantum logic gate.   
     
     
         5 . The method according to  claim 3 , wherein the constructing the first directed acyclic graph based on the quantum logic gates comprises:
 constructing, when the quantum logic gates comprise a plurality of continuous two-quantum logic gates and the plurality of continuous two-quantum logic gates act on two identical logical qubits, the first directed acyclic graph based on any one of the plurality of continuous two-quantum logic gates.   
     
     
         6 . The method according to  claim 5 , wherein the method further comprises:
 constructing, when the quantum logic gates comprise the plurality of continuous two-quantum logic gates and the plurality of continuous two-quantum logic gates act on two different logical qubits, the first directed acyclic graph based on the plurality of continuous two-quantum logic gates.   
     
     
         7 . The method according to  claim 2 , wherein the traversing the first directed acyclic graph to obtain the maximum subgraph sequence comprises:
 determining a first node in the first directed acyclic graph, an in-degree of the first node being 0;   generating a first subgraph based on the first node;   deleting the first node to obtain a second directed acyclic graph;   determining whether a second node exists in the second directed acyclic graph, an in-degree of the second node being 0;   determining the first subgraph as a maximum subgraph when the second node does not exist in the second directed acyclic graph; and   arranging the maximum subgraphs in an order of generation to obtain the maximum subgraph sequence.   
     
     
         8 . The method according to  claim 7 , wherein the traversing the first directed acyclic graph to obtain the maximum subgraph sequence further comprises:
 determining, when the second node exists in the second directed acyclic graph, a priority of the second node, wherein the second node comprises two points and an edge, the two points are configured to represent two logical qubits in the quantum program, and the edge is configured to represent the quantum logic gate acting on the two logical qubits; and the priority of the second node is determined based on the two points, the edge, and the first subgraph; and   generating a maximum subgraph based on the second node and the priority of the second node.   
     
     
         9 . The method according to  claim 8 , wherein the generating the maximum subgraph based on the second node and the priority of the second node comprises:
 expanding, when the second node has a first priority, the first subgraph into a second subgraph, and taking the second subgraph as a new first subgraph;   deleting the second node to obtain a third directed acyclic graph; and   taking the third directed acyclic graph as a new second directed acyclic graph, and then performing the step of determining whether a second node exists in the second directed acyclic graph.   
     
     
         10 . The method according to  claim 9 , wherein the generating the maximum subgraph based on the second node and the priority of the second node further comprises:
 taking, when the second node has a second priority, the second node as a new first node, and then performing the step of generating a first subgraph based on the first node, wherein the first priority is prior than the second priority.   
     
     
         11 . The method according to  claim 10 , wherein the first priority comprises a first subpriority and a second subpriority, and the second priority comprises a third subpriority and a fourth subpriority; and the determining a priority of the second node comprises:
 determining the priority of the second node as the fourth subpriority when the two points and the edge do not exist in the first subgraph;   determining the priority of the second node as the third subpriority when the two points exist and the edge does not exist in the first subgraph;   determining the priority of the second node as the second subpriority when one of the two points exists and the edge does not exist in the first subgraph; and   determining the priority of the second node as the first subpriority if the two points and the edge exist in the first subgraph; wherein the priorities, from high to low, are sequentially the first subpriority, the second subpriority, the third subpriority, and the fourth subpriority.   
     
     
         12 . The method according to  claim 1 , wherein the N maximum subgraphs constitute a maximum subgraph sequence, an isomorphic subgraph set corresponding to an i th  maximum subgraph in the maximum subgraph sequence comprises k i  isomorphic subgraphs, and the maximum subgraph sequence is numbered from 0 to N−1; and the determining a fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs and an exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs, and constructing the quantum circuit based on the fixed cost and the exchange cost comprises:
 determining the fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs to obtain N fixed cost sets, wherein the N fixed cost sets are in one-to-one correspondence to the N sets of isomorphic subgraphs; 
 determining the exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs in the N sets of isomorphic subgraphs to obtain N−1 exchange cost sets, wherein each of the exchange cost sets comprises k i ·k i+1  exchange costs; 
 determining 
 
       
         
           
             
               
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       consumption costs based on the N fixed cost sets and the N−1 exchange cost sets; and
 constructing the quantum circuit based on the 
 
       
         
           
             
               
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       consumption costs. 
     
     
         13 . The method according to  claim 1 , wherein the N maximum subgraphs constitute a maximum subgraph sequence, a set of isomorphic subgraphs corresponding to an i th  maximum subgraph in the maximum subgraph sequence comprises k i  isomorphic subgraphs, and the maximum subgraph sequence is numbered from 0 to N−1; and the determining a fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs and an exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs, and constructing the quantum circuit based on the fixed cost and the exchange cost comprises:
 determining a first fixed cost of each first isomorphic subgraph in a first set of isomorphic subgraphs to obtain a first fixed cost set, wherein the first set of isomorphic subgraphs is an isomorphic subgraph set corresponding to the 0 th  maximum subgraph; 
 determining a second fixed cost of each second isomorphic subgraph in a second set of isomorphic subgraphs to obtain a second fixed cost set, wherein the second set of isomorphic subgraphs is an isomorphic subgraph set corresponding to the i th  maximum subgraph; 
 determining exchange costs of all the first isomorphic subgraphs in the first set of isomorphic subgraphs and each second isomorphic subgraph in the second set of isomorphic subgraphs to obtain k i  exchange cost sets, wherein each of the exchange cost sets comprises k 0  exchange costs; 
 determining k i  consumption cost sets based on the first fixed cost set, the second fixed cost set, and the k i  exchange cost sets, wherein each of the consumption cost sets comprises k 0  consumption costs; 
 determining a minimum consumption cost in each of the consumption cost sets to obtain k i  minimum consumption costs, wherein the k i  minimum consumption costs are in one-to-one correspondence to k i  second isomorphic subgraphs in the second set of isomorphic subgraphs; 
 constituting each second isomorphic subgraph in the k i  second isomorphic subgraphs and the first isomorphic subgraph corresponding thereto into a new first isomorphic subgraph, to obtain k i  new first isomorphic subgraphs; 
 determining the k i  new first isomorphic subgraphs as a new first set of isomorphic subgraphs; 
 setting i=i+1, and performing the step of determining a first fixed cost of each first isomorphic subgraph in a first isomorphic subgraph set to obtain a first fixed cost set, wherein an initial value of i is 1; and 
 constructing, when i=N−1, the quantum circuit based on the obtained k N−1  minimum consumption costs. 
 
     
     
         14 . The method according to  claim 1 , wherein the N maximum subgraphs constitute a maximum subgraph sequence, a set of isomorphic subgraphs corresponding to an i th  maximum subgraph in the maximum subgraph sequence comprises k i  isomorphic subgraphs, and the maximum subgraph sequence is numbered from 0 to N−1; and the determining a fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs and an exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs, and constructing the quantum circuit based on the fixed cost and the exchange cost comprises:
 determining a first fixed cost of each first isomorphic subgraph in a first set of isomorphic subgraphs to obtain a first fixed cost set, wherein the first set of isomorphic subgraphs is an isomorphic subgraph set corresponding to the 0 th  maximum subgraph; 
 determining a second fixed cost of each second isomorphic subgraph in a second set of isomorphic subgraphs to obtain a second fixed cost set, wherein the second set of isomorphic subgraphs is an isomorphic subgraph set corresponding to the i th  maximum subgraph; 
 determining exchange costs of all the second isomorphic subgraphs in the second sets of isomorphic subgraphs and each first isomorphic subgraph in the first set of isomorphic subgraphs to obtain k 0  exchange cost sets, wherein each of the exchange cost sets comprises k i  exchange costs; 
 determining k 0  consumption cost sets based on the first fixed cost set, the second fixed cost set, and the k 0  exchange cost sets, wherein each of the consumption cost sets comprises k i  consumption costs; 
 determining a minimum consumption cost in each of the consumption cost sets to obtain k 0  minimum consumption costs, wherein the k 0  minimum consumption costs are in one-to-one correspondence to k 0  first isomorphic subgraphs in the first set of isomorphic subgraphs; 
 constituting each first isomorphic subgraph in the k 0  first isomorphic subgraphs and the second isomorphic subgraph corresponding thereto into a new first isomorphic subgraph, to obtain k 0  new first isomorphic subgraphs; 
 determining the k 0  new first isomorphic subgraphs as a new first set of isomorphic subgraphs; 
 setting i=i+1, and performing the step of determining a first fixed cost of each first isomorphic subgraph in a first set of isomorphic subgraphs to obtain a first fixed cost set, wherein an initial value of i is 1; and 
 constructing, when i=N−1, the quantum circuit based on the obtained k 0  minimum consumption costs. 
 
     
     
         15 . The method according to  claim 1 , wherein the fixed cost and the exchange cost are determined based on fidelity, or
 wherein the fixed cost and the exchange cost are determined based on a number of CZ gates.   
     
     
         16 . A quantum computing platform adaptation apparatus, comprising:
 at least one processor; and   a memory configured to store instructions executable by the at least one processor;   wherein the instructions cause the at least one processor to:   acquire a quantum program and a topological structure of a quantum chip corresponding to a quantum computing platform, wherein the topological structure is configured to represent physical qubits in an electronic device and a connection relationship between the physical qubits; and   adapt the quantum program to the quantum computing platform based on the topological structure,   wherein the adapting the quantum program to the quantum computing platform based on the topological structure comprises:
 determining N sets of isomorphic subgraphs corresponding to N maximum subgraphs of the quantum program, wherein the N maximum subgraphs are determined based on a directed acyclic graph of the quantum program, the N sets of isomorphic subgraphs constitute a bit relation graph on the quantum chip obtained by mapping the N maximum subgraphs based on the topological structure of the quantum chip in the electronic device, and N is an integer greater than or equal to 1; and 
 determining a fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs and an exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs, and constructing a quantum circuit based on the fixed cost and the exchange cost, wherein the fixed cost is determined based on the quantum logic gate corresponding to the isomorphic subgraph, and the exchange cost is determined based on SWAP gates required for conversion between quantum logic gates corresponding to the isomorphic subgraphs. 
   
     
     
         17 . The apparatus according to  claim 16 , wherein the processor is further configured to:
 construct a first directed acyclic graph of the quantum program;   traverse the first directed acyclic graph to obtain a maximum subgraph sequence, the maximum subgraph sequence comprises N maximum subgraphs, and N is an integer greater than or equal to 1;   determine isomorphic subgraphs of the N maximum subgraphs in the topological structure to obtain N sets of isomorphic subgraphs, the N sets of isomorphic subgraphs being in one-to-one correspondence to the N maximum subgraphs; and   construct the quantum circuit based on the N sets of isomorphic subgraphs, wherein the quantum circuit is configured to operate on the quantum computing platform.   
     
     
         18 . A non-transitory computer-readable storage medium, wherein the computer-readable storage medium stores computer program instructions thereon, the computer program instructions, when being executed by a processor, are configured to:
 acquire a quantum program and a topological structure of a quantum chip corresponding to a quantum computing platform, wherein the topological structure is configured to represent physical qubits in an electronic device and a connection relationship between the physical qubits; and   adapt the quantum program to the quantum computing platform based on the topological structure,   wherein the adapting the quantum program to the quantum computing platform based on the topological structure comprises:
 determining N sets of isomorphic subgraphs corresponding to N maximum subgraphs of the quantum program, wherein the N maximum subgraphs are determined based on a directed acyclic graph of the quantum program, the N sets of isomorphic subgraphs constitute a bit relation graph on the quantum chip obtained by mapping the N maximum subgraphs based on the topological structure of the quantum chip in the electronic device, and N is an integer greater than or equal to 1; and 
 determining a fixed cost of each isomorphic subgraph in the N sets of isomorphic subgraphs and an exchange cost between any two isomorphic subgraphs in any adjacent sets of isomorphic subgraphs, and constructing a quantum circuit based on the fixed cost and the exchange cost, wherein the fixed cost is determined based on the quantum logic gate corresponding to the isomorphic subgraph, and the exchange cost is determined based on SWAP gates required for conversion between quantum logic gates corresponding to the isomorphic subgraphs. 
   
     
     
         19 . The non-transitory computer-readable storage medium according to  claim 18 , wherein the processor is further configured to:
 construct a first directed acyclic graph of the quantum program;   traverse the first directed acyclic graph to obtain a maximum subgraph sequence, the maximum subgraph sequence comprises N maximum subgraphs, and N is an integer greater than or equal to 1;   determine isomorphic subgraphs of the N maximum subgraphs in the topological structure to obtain N sets of isomorphic subgraphs, the N sets of isomorphic subgraphs being in one-to-one correspondence to the N maximum subgraphs; and   construct the quantum circuit based on the N sets of isomorphic subgraphs, wherein the quantum circuit is configured to operate on the quantum computing platform.

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