US12500202B2ActiveUtilityA1

Semiconductor device and manufacturing method thereof

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Assignee: KIOXIA CORPPriority: Sep 1, 2022Filed: Dec 13, 2022Granted: Dec 16, 2025
Est. expirySep 1, 2042(~16.1 yrs left)· nominal 20-yr term from priority
Inventors:Kazuma Hasegawa
H10W 90/754H10W 90/752H10W 90/734H10W 90/732H10W 72/07554H10W 72/07553H10W 72/07552H10W 72/5366H10W 72/5363H10W 72/884H10W 72/865H10W 72/537H10W 72/536H10W 72/527H10W 72/521H10W 90/24H10W 90/00H10W 72/075H10W 72/851H10W 72/50H10W 74/01H10W 70/611H10W 70/65H10W 74/117H10W 70/05H01L 2924/15311H01L 2924/1438H01L 2224/73265H01L 2224/73215H01L 2224/4917H01L 2224/49052H01L 2224/4903H01L 2224/48465H01L 2224/48227H01L 2224/48147H01L 2224/48095H01L 2224/48091H01L 2224/48011H01L 2224/32225H01L 2224/32145H01L 25/16H01L 25/50H01L 25/0652H01L 24/73H01L 24/48H01L 24/32H01L 24/49
62
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References
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Claims

Abstract

A semiconductor device according to an embodiment includes a substrate, a first semiconductor chip, a second semiconductor chip, a first wire and a second wire. The substrate includes a first surface. The first semiconductor chip is provided on the first surface. The second semiconductor chip is provided at a position on the first surface that is apart from a position of the first semiconductor chip in a first direction. The first wire is electrically connected to the first semiconductor chip, and is provided to extend to the side of the second semiconductor chip. The second wire is electrically connected to the second semiconductor chip, and is provided to extend to the side of the first semiconductor chip. The first wire and the second wire cross as viewed in a third direction substantially perpendicular to both of the first direction and a second direction substantially perpendicular to the first surface.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate including a first surface;   a first semiconductor chip provided on the first surface;   a second semiconductor chip provided at a position on the first surface that is apart from a position of the first semiconductor chip in a first direction, the first direction being substantially parallel to the first surface;   a first wire electrically connected to the first semiconductor chip and provided to extend to a side of the second semiconductor chip; and   a second wire electrically connected to the second semiconductor chip and provided to extend to a side of the first semiconductor chip, wherein   the first wire and the second wire cross as viewed in a third direction, the third direction being substantially perpendicular to both of the first direction and a second direction, the second direction being substantially perpendicular to the first surface.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising:
 a first stack body in which a plurality of semiconductor chips is stacked in the second direction; and   a second stack body in which a plurality of semiconductor chips is stacked in the second direction, wherein   the first semiconductor chip is one of the semiconductor chips in the first stack body, and   the second semiconductor chip is one of the semiconductor chips in the second stack body.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein:
 the first stack body includes   a first chip group in which a plurality of semiconductor chips is stacked to be shifted in a fourth direction, the fourth direction being substantially parallel to the first surface, and   a second chip group in which a plurality of semiconductor chips is stacked to be shifted in an opposite direction of the fourth direction, the second chip group being provided on the first chip group; and   the second stack body includes   a third chip group in which a plurality of semiconductor chips is stacked to be shifted in a fifth direction, the fifth direction being substantially parallel to the first surface, and   a fourth chip group in which a plurality of semiconductor chips is stacked to be shifted in an opposite direction of the fifth direction, the fourth chip group being provided on the third chip group.   
     
     
         4 . The semiconductor device according to  claim 3 , wherein:
 the fourth direction is a direction of a side of the second stack body; and   the fifth direction is a direction of a side of the first stack body.   
     
     
         5 . The semiconductor device according to  claim 3 , wherein the first wire extends to reach a space between the second stack body and the substrate, and/or the second wire extends to reach a space between the first stack body and the substrate. 
     
     
         6 . The semiconductor device according to  claim 3 , further comprising a member including a first pad and a second pad that are electrically connected to the substrate, the member being provided between the first stack body and the second stack body, wherein:
 the first wire is connected to the first pad; and   the second wire is connected to the second pad.   
     
     
         7 . The semiconductor device according to  claim 6 , further comprising:
 a third wire electrically connecting the first pad and the substrate; and   a fourth wire electrically connecting the second pad and the substrate, wherein   the third wire extends to reach a space between the second stack body and the substrate, and/or the fourth wire extends to reach a space between the first stack body and the substrate.   
     
     
         8 . The semiconductor device according to  claim 2 , further comprising an electronic component provided on the substrate, wherein
 the electronic component is disposed in at least a part of a space between the substrate and the first stack body or the second stack body in which a plurality of semiconductor chips is stacked to be shifted in a direction parallel to the first surface.   
     
     
         9 . The semiconductor device according to  claim 1 , further comprising a spacer provided between the substrate and at least one of the first semiconductor chip and the second semiconductor chip. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein the substrate further includes a third pad electrically connected to both of the first wire and the second wire. 
     
     
         11 . The semiconductor device according to  claim 2 , further comprising a connection wiring electrically connecting a semiconductor chip in the first stack body and a semiconductor chip in the second stack body. 
     
     
         12 . The semiconductor device according to  claim 1 , further comprising a third semiconductor chip provided between the first semiconductor chip and the second semiconductor chip, wherein
 the first wire and the second wire cross above the third semiconductor chip as viewed in the third direction.   
     
     
         13 . The semiconductor device according to  claim 1 , wherein each of the first wire and the second wire includes a ball bonding portion at an end portion on an opposite side of the substrate, and includes a wedge bonding portion at an end portion on a side of the substrate. 
     
     
         14 . A manufacturing method of a semiconductor device, comprising:
 providing a member on a first surface of a substrate, the member including a first pad and a second pad;   providing a first stack body and a second stack body on both sides of the member along a first direction, each of the first stack body and the second stack body being a stack body in which a plurality of semiconductor chips is stacked, the first direction being substantially parallel to the first surface; and   forming a first wire and a second wire, the first wire electrically connecting the first stack body and the first pad, the second wire electrically connecting the second stack body and the second pad, wherein   the first wire and the second wire cross as viewed in a third direction, the third direction being substantially perpendicular to both of the first direction and a second direction, the second direction being substantially perpendicular to the first surface.   
     
     
         15 . The manufacturing method of the semiconductor device according to  claim 14 , further comprising forming a third wire and a fourth wire after providing the member, the third wire electrically connecting the first pad and the substrate, the fourth wire electrically connecting the second pad and the substrate.

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