US12518923B2ActiveUtilityA1

Multilayer ceramic capacitor and method of manufacturing the same

66
Assignee: SAMSUNG ELECTRO MECHPriority: Sep 15, 2023Filed: Dec 11, 2023Granted: Jan 6, 2026
Est. expirySep 15, 2043(~17.2 yrs left)· nominal 20-yr term from priority
H01G 4/306H01G 4/1281H01G 13/00H01G 4/012H01G 4/30H01G 4/1227
66
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Claims

Abstract

Provided is a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed outside the capacitor body. The dielectric layer includes barium titanate-based main ingredient including barium (Ba) and titanium (Ti), and gallium (Ga)Peak intensity ratio of Ba/Ga (IBa/IGa), obtained by TEM-EDS analysis of a region from an interface between the dielectric layer and the internal electrode layer to a depth surface of 10 nm to 500 nm into the dielectric layer, is 1.0 to 5.0.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A multilayer ceramic capacitor, comprising:
 a capacitor body including a dielectric layer and an internal electrode layer; and   an external electrode disposed outside the capacitor body,   wherein the dielectric layer includes barium titanate-based main ingredient including barium (Ba) and titanium (Ti), and gallium (Ga), and   peak intensity ratio of Ba/Ga (I Ba /I Ga ), obtained by TEM-EDS analysis of a region from an interface between the dielectric layer and the internal electrode layer to a depth surface of 10 nm to 500 nm into the dielectric layer, is 1.0 to 5.0.   
     
     
         2 . The multilayer ceramic capacitor of  claim 1 , wherein:
 peak intensity ratio of Ti/Ga (I Ti /I Ga ), obtained by the TEM-EDS analysis of the region, is 1.0 to 5.0.   
     
     
         3 . The multilayer ceramic capacitor of  claim 1 , wherein:
 the dielectric layer further comprises an accessory ingredient, and   the accessory ingredient comprises aluminum (Al), silicon (Si), magnesium (Mg), vanadium (V), manganese (Mn), or a combination thereof.   
     
     
         4 . The multilayer ceramic capacitor of  claim 3 , wherein:
 the accessory ingredient includes the aluminum (Al), and   peak intensity ratio of Al/Ga (I Al /I Ga ), obtained by the TEM-EDS analysis of the region, is 1.0 to 5.0.   
     
     
         5 . The multilayer ceramic capacitor of  claim 3 , wherein:
 the accessory ingredient includes the silicon (Si), and   peak intensity ratio of Si/Ga (I Si /I Ga ), obtained by the TEM-EDS analysis of the region, is 1.0 to 5.0.   
     
     
         6 . The multilayer ceramic capacitor of  claim 3 , wherein:
 the accessory ingredient includes the magnesium (Mg), and   peak intensity ratio of Mg/Ga (I Mg /I Ga ), obtained by the TEM-EDS analysis of the region, is 0.4 to 2.0.   
     
     
         7 . The multilayer ceramic capacitor of  claim 3 , wherein:
 the gallium (Ga) exists as a second phase in combination with the accessory ingredient.   
     
     
         8 . The multilayer ceramic capacitor of  claim 1 , wherein:
 the gallium (Ga) is included in an amount of 0.01 parts by mole to 10 parts by mole based on 100 parts by mole of the barium titanate-based main ingredient.   
     
     
         9 . The multilayer ceramic capacitor of  claim 1 , wherein:
 the dielectric layer includes a plurality of grains and a grain boundary positioned between the adjacent grains, and   the gallium (Ga) exists at the grain boundary.   
     
     
         10 . The multilayer ceramic capacitor of  claim 9 , wherein:
 the molar ratio of gallium (Ga) existing in the grain boundary and gallium (Ga) existing in the grain is 5:1 to 50:1.   
     
     
         11 . The multilayer ceramic capacitor of  claim 1 , wherein:
 the gallium (Ga) is formed from a gallium (Ga) complex.   
     
     
         12 . The multilayer ceramic capacitor of  claim 1 , wherein:
 the capacitor body is formed by sintering at a temperature of 1000° C. to 1200° C.   
     
     
         13 . The multilayer ceramic capacitor of  claim 1 , wherein:
 the capacitor body has an active portion in which the dielectric layer and the internal electrode layer are alternately arranged,   the internal electrode connectivity defined by Equation 1 below in the active portion is 80% or more to 100% or less,
   Internal electrode connectivity(%)=(total length of connection portions excluding a disconnection portion in the plurality of internal electrode layers/total length of the plurality of internal electrode layers)×100  (Equation 1)
 
   
     
     
         14 . The multilayer ceramic capacitor of  claim 13 , wherein:
 the capacitor body further has side margin portions disposed on both side ends of the active portion facing each other, and   the internal electrode connectivity defined by Equation 1 in a region near side margin portion, which is defined as a region from a boundary of the active portion and the side margin portion to a depth surface corresponding to a point of 5% to 20% of the total length of the active portion into the active portion, is 80% or more to 100% or less.   
     
     
         15 . A method of manufacturing a multilayer ceramic capacitor, comprising:
 preparing a dielectric slurry by mixing barium titanate-based main ingredient powder and gallium (Ga) complex;   preparing a dielectric green sheet using the dielectric slurry and forming a conductive paste layer on the surface of the dielectric green sheet;   preparing a dielectric green sheet stacking structure by stacking the dielectric green sheet on which the conductive paste layer is formed;   preparing a capacitor body including a dielectric layer and an internal electrode layer by sintering the dielectric green sheet stacking structure; and   forming an external electrode on one surface of the capacitor body,   wherein the dielectric layer includes barium titanate-based main ingredient including barium (Ba) and titanium (Ti), and gallium (Ga), and   peak intensity ratio of Ba/Ga (I Ba /I Ga ), obtained by TEM-EDS analysis of a region from an interface between the dielectric layer and the internal electrode layer to a depth surface of 10 nm to 500 nm into the dielectric layer, is 1.0 to 5.0.   
     
     
         16 . The method of manufacturing the multilayer ceramic capacitor of  claim 15 , wherein:
 the gallium (Ga) complex includes gallium carboxylate in ionic form.   
     
     
         17 . The method of manufacturing the multilayer ceramic capacitor of  claim 15 , wherein:
 the gallium (Ga) complex is mixed in an amount of 0.01 parts by mole to 10 parts by mole based on 100 parts by mole of the barium titanate-based main ingredient powder.   
     
     
         18 . The method of manufacturing the multilayer ceramic capacitor of  claim 15 , wherein:
 the dielectric slurry is prepared by further mixing accessory ingredient powder including aluminum oxide (Al 2 O 3 ), silicon dioxide (SiO 2 ), magnesium oxide (MgO), vanadium oxide (V 2 O 5 ), manganese oxide (MnO 2 ), or a combination thereof.   
     
     
         19 . The method of manufacturing the multilayer ceramic capacitor of  claim 18 , wherein:
 based on 100 parts by mole of the barium titanate-based main ingredient powder,   the aluminum oxide (Al 2 O 3 ) is mixed in an amount of 0.01 parts by mole to 5 parts by mole,   the silicon dioxide (SiO 2 ) is mixed in an amount of 0.01 parts by mole to 5 parts by mole,   the magnesium oxide (MgO) is mixed in an amount of 0.01 parts by mole to 5 parts by mole,   the vanadium oxide (V 2 O 5 ) is mixed in an amount of 0.01 parts by mole to 5 parts by mole, and   the manganese oxide (MnO 2 ) is mixed in an amount of 0.01 parts by mole to 5 parts by mole.   
     
     
         20 . The method of manufacturing the multilayer ceramic capacitor of  claim 15 , wherein:
 the sintering is performed at a temperature of 1000° C. to 1200° C.

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