US12527118B1ActiveUtility

Sensor array device and method therefor

55
Assignee: AELUMA INCPriority: Feb 3, 2022Filed: Jan 10, 2023Granted: Jan 13, 2026
Est. expiryFeb 3, 2042(~15.6 yrs left)· nominal 20-yr term from priority
H10H 20/8264H10H 20/852H10H 20/0137H10H 20/01H10F 71/121H10F 39/807H10F 39/011
55
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Cited by
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References
20
Claims

Abstract

A sensor device and method of fabrication therefor. The method includes providing a partially completed semiconductor substrate having the following stacked materials: a silicon substrate, a buffer material, an n-type semiconductor material, an unintentionally doped (UID) optically absorptive material, a UID optically transparent semiconductor material, and a native insulating material. The substrate is sealed in a predetermined environment within a first carrier device, and then transferred from a first geographic location to a second geographic location. The substrate is then transferred to a second carrier device and cleaned. A dielectric material is formed overlying the substrate and patterned to form a p-type contact region and an n-type contact region. A p-type semiconductor region is formed via the p-type contact region, a p-type metal contact is formed overlying the p-type contact region, and an n-type metal contact is formed overlying the n-type contact region to form a common n-type electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for fabricating a sensor device, the method comprising:
 providing a partially completed semiconductor substrate comprising a silicon substrate, a buffer material overlying the silicon substrate, an n-type semiconductor material overlying the buffer material, an unintentionally doped (UID) optically absorptive semiconductor material overlying the n-type semiconductor material, and a p-type semiconductor material overlying the UID optically absorptive semiconductor material, and a native insulating material overlying the p-type semiconductor material;   placing the partially completed semiconductor substrate into a first carrier device, the first carrier device being sealed and maintained in a predetermined environment, the predetermined environment including a nitrogen containing material;   transferring the first carrier device, including the partially completed semiconductor substrate from a first geographic location to a second geographic location;   transferring the partially completed semiconductor substrate from the first carrier device to a second carrier device;   cleaning the partially completed semiconductor substrate;   forming a dielectric material overlying a surface region of the partially completed semiconductor substrate;   forming a p-type contact region overlying a first portion of the surface region to define a pattern in the dielectric material;   forming a p-type metal contact region overlying the p-type contact region;   etching a portion of the p-type semiconductor material, a portion of the n-type  21  semiconductor material, and a portion of the UID optically absorptive semiconductor material to define an n-type contact opening; and   forming an n-type metal contact region within the etched portions to form a common n-type electrode.   
     
     
         2 . The method of  claim 1  wherein the dielectric material is selected from silicon nitride, aluminum nitride, an oxide material, a nitride material, silicon dioxide, aluminum dioxide, or a silicate material. 
     
     
         3 . The method of  claim 1  wherein the p-type metal contact region or the n-type metal contact region comprises titanium, platinum, gold, nickel, palladium, germanium, tungsten, aluminum, zinc, or a combination thereof. 
     
     
         4 . The method of  claim 1  wherein the n-type semiconductor material, the UID optically absorptive semiconductor material, and the p-type semiconductor material form a pixel array region;
 wherein the pixel array region comprises a plurality of pixel elements within a center portion of the silicon substrate; and 
 wherein the silicon substrate includes an exterior region comprising a plurality of cathode regions, each of the cathode regions being connected to each other to form a common cathode element. 
 
     
     
         5 . The method of  claim 1  further comprising forming a bump material overlying the p-type metal contact region. 
     
     
         6 . The method of  claim 1  further comprising forming a transition material overlying the buffer material, the transition material being spatially configured between the buffer material and the UID optically absorptive semiconductor material. 
     
     
         7 . A method for fabricating a sensor device, the method comprising:
 providing a partially completed semiconductor substrate comprising a silicon substrate, a buffer material overlying the silicon substrate, an n-type semiconductor material overlying the buffer material, an unintentionally doped (UID) optically absorptive semiconductor material overlying the n-type semiconductor material, and a UID optically transparent semiconductor material overlying the UID optically absorptive semiconductor material, and a native insulating material overlying the UID optically transparent semiconductor material;   placing the partially completed semiconductor substrate into a first carrier device, the first carrier device being sealed and maintained in a predetermined environment, the predetermined environment including a nitrogen containing material;   transferring the first carrier device, including the partially completed semiconductor substrate from a first geographic location to a second geographic location;   transferring the partially completed semiconductor substrate from the first carrier device to a second carrier device;   cleaning the partially completed semiconductor substrate;   forming a dielectric material overlying a surface region of the partially completed semiconductor substrate;   forming a p-type contact region overlying a first portion of the surface region to define a pattern in the dielectric material;   forming a p-type semiconductor region using the pattern to introduce a p-type impurity into the UID optically transparent semiconductor material using either an implantation or diffusion process;   forming a p-type metal contact region overlying the p-type contact region;   etching a portion of the UID optically transparent semiconductor material, a  24  portion of the UID optically absorptive semiconductor material, and a portion of the n-type semiconductor material to define an n-type contact opening; and   forming an n-type metal contact region within the etched portions to form a common n-type electrode.   
     
     
         8 . The method of  claim 7  wherein the dielectric material is selected from silicon nitride, aluminum nitride, an oxide material, a nitride material, silicon dioxide, aluminum dioxide, or a silicate material. 
     
     
         9 . The method of  claim 7  wherein the p-type metal contact region or the n-type metal contact region comprises titanium, platinum, gold, nickel, palladium, germanium, tungsten, aluminum, zinc, or a combination thereof. 
     
     
         10 . The method of  claim 7  wherein the n-type semiconductor material, the UID optically absorptive semiconductor material, and the UID optically transparent semiconductor material form a pixel array region;
 wherein the pixel array region comprises a plurality of pixel elements within a center portion of the silicon substrate; and 
 wherein the silicon substrate includes an exterior region comprising a plurality of cathode regions, each of the cathode regions being connected to each other to form a common cathode element. 
 
     
     
         11 . The method of  claim 7  further comprising forming a bump material overlying the p-type metal contact region. 
     
     
         12 . The method of  claim 1  further comprising forming a transition material overlying the buffer material, the transition material being spatially configured between the buffer material and the UID optically absorptive semiconductor material. 
     
     
         13 . A method for fabricating a sensor device, the method comprising:
 providing a partially completed semiconductor substrate comprising a silicon substrate, a buffer material overlying the silicon substrate, an n-type semiconductor material overlying the buffer material, a first unintentionally doped (UID) semiconductor material overlying the n-type semiconductor material, and a second UID semiconductor material overlying the first UID semiconductor material, and an insulating material overlying the second UID semiconductor material;   placing the partially completed semiconductor substrate into a first carrier device, the first carrier device being sealed and maintained in a predetermined environment;   transferring the first carrier device, including the partially completed semiconductor substrate from a first geographic location to a second geographic location;   transferring the partially completed semiconductor substrate from the first carrier device to a second carrier device;   cleaning the partially completed semiconductor substrate;   forming a dielectric material overlying a surface region of the partially completed semiconductor substrate;   forming a p-type contact region overlying a first portion of the surface region to define a pattern in the dielectric material;   forming a p-type semiconductor region using the pattern to introduce a p-type impurity into the second UID semiconductor material using either an implantation or diffusion process;   forming a p-type metal contact region overlying the p-type contact region;   etching a portion of the second UID semiconductor material, a portion of the n-type semiconductor material, and a portion of the first UID semiconductor material to define an n-type contact opening; and   forming an n-type metal contact region within the etched portions to form a common n-type electrode.   
     
     
         14 . The method of  claim 13  wherein the dielectric material is selected from silicon nitride, aluminum nitride, an oxide material, a nitride material, silicon dioxide, aluminum dioxide, or a silicate material. 
     
     
         15 . The method of  claim 13  wherein the p-type metal contact region or the n-type metal contact region comprises titanium, platinum, gold, nickel, palladium, germanium, tungsten, aluminum, zinc, or a combination thereof. 
     
     
         16 . The method of  claim 13  wherein the n-type semiconductor material, the first UID semiconductor material, and the second UID semiconductor material form a pixel array region;
 wherein the pixel array region comprises a plurality of pixel elements within a center portion of the silicon substrate; and 
 wherein the silicon substrate includes an exterior region comprising a plurality of cathode regions, each of the cathode regions being connected to each other to form a common cathode element. 
 
     
     
         17 . The method of  claim 13  wherein the first UID semiconductor material is characterized as optically absorptive and the second UID semiconductor material is characterized as optically transparent. 
     
     
         18 . The method of  claim 13  wherein the predetermined environment comprises a nitrogen containing environment or a clean dry air (CDA) containing environment. 
     
     
         19 . The method of  claim 13  further comprising forming a bump material overlying the p-type metal contact region. 
     
     
         20 . The method of  claim 13  further comprising forming a transition material overlying the buffer material, the transition material being spatially configured between the buffer material and the UID optically absorptive semiconductor material.

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