Live memory recovery using a pluggable memory module

Abstract

Systems and techniques for live memory recovery using a pluggable memory module are described herein. It may be detected that a spare memory module has been inserted into a computing device based on a signal transmitted from the spare memory module. The spare memory module may be initialized. A dynamic random-access memory (DRAM) module of the computing device may be identified that is predicted to fail. Freeze instructions may be transmitted to a virtual machine manager to pause virtual machines executing on the computing device. Memory data may be transferred from the DRAM module to the spare memory module. Memory addresses may be remapped from the DRAM module to the spare memory module. Unfreeze instructions may be transmitted to the virtual machine manager to resume the virtual machines executing on the computing device.

What is claimed is: 
     
         1 . A system for live dynamic random-access memory recovery comprising:
 at least one processor; and   memory comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to:
 detect that a spare memory module has been inserted into a hot-pluggable interface of a computing device that is in an operational state based on a signal transmitted from logic contained in the spare memory module upon insertion into the hot-pluggable interface, wherein the hot-pluggable interface enables power on of the spare memory module upon insertion subsequent to an initial boot sequence of the computing device, and wherein the signal is transmitted upon power on of the spare memory module; 
 initialize the spare memory module; 
 receive an indication of a predicted failure of a dynamic random-access memory (DRAM) module of the computing device, the indication received before actual failure of the DRAM module; 
 transmit freeze instructions to a virtual machine manager to pause virtual machines executing on the computing device; 
 transfer memory data from the DRAM module to the spare memory module; 
 remap memory addresses from the DRAM module to the spare memory module; and 
 transmit unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device. 
   
     
     
         2 . The system of  claim 1 , the memory further comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to:
 obtain memory information from firmware of the computing device, wherein the memory information includes an interleaved set of the DRAM module and details of a socket, slot, and channel of the DRAM module; and   obtain a physical memory map for the DRAM module, wherein the DRAM module is identified using the memory information and the physical memory map.   
     
     
         3 . The system of  claim 1 , wherein the freeze instructions to the virtual machine manager to pause the virtual machines executing on the computing device include commands to place a core and input output processes in an idle state and to prevent memory traffic generation. 
     
     
         4 . The system of  claim 1 , the instructions to transfer the memory data from the DRAM module to the spare memory module further comprising instructions to mirror an interleaved set of the DRAM module to the spare memory module. 
     
     
         5 . The system of  claim 1 , wherein the unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device include commands to place a core and input output processes in an active state and to resume memory traffic generation. 
     
     
         6 . The system of  claim 1 , the memory further comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to:
 receive a memory replacement initiation request;   transmit a request to firmware of the computing device to reprogram DRAM module memory training data to a replacement DRAM module;   initialize the replacement DRAM module inserted into the computing device using the DRAM module memory training data;   transmit the freeze instructions to the virtual machine manager to pause the virtual machines executing on the computing device;   transfer memory data from the spare memory module to the replacement DRAM module;   remap memory addresses from the spare memory module to the replacement DRAM module; and   transmit the unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device.   
     
     
         7 . The system of  claim 6 , the memory further comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to transmit a shutdown request to the spare memory module, wherein the shutdown request places the spare memory module in a removable state. 
     
     
         8 . The system of  claim 6 , wherein the memory replacement initiation request is received from a computing device repair orchestration software agent via an out of band interconnect that facilitates communication between a board controller manageability device and the computing device. 
     
     
         9 . The system of  claim 1 , wherein the spare memory module is a peripheral component interlink express compatible device, wherein the spare memory module comprises a memory capacity at least equal to a capacity of the DRAM module, and wherein the spare memory module comprises a set of compute express link instructions. 
     
     
         10 . A method for live dynamic random-access memory recovery comprising:
 detecting that a spare memory module has been inserted into a hot-pluggable interface of a computing device that is in an operational state based on a signal transmitted from logic contained in the spare memory module upon insertion into the hot-pluggable interface, wherein the hot-pluggable interface enables power on of the spare memory module upon insertion subsequent to an initial boot sequence of the computing device, and wherein the signal is transmitted upon power on of the spare memory module;   initializing the spare memory module;   receiving an indication of a predicted failure of a dynamic random-access memory (DRAM) module of the computing device, the indication received before actual failure of the DRAM module;   transmitting freeze instructions to a virtual machine manager to pause virtual machines executing on the computing device;   transferring memory data from the DRAM module to the spare memory module;   remapping memory addresses from the DRAM module to the spare memory module; and   transmitting unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device.   
     
     
         11 . The method of  claim 10 , further comprising:
 obtaining memory information from firmware of the computing device, wherein the memory information includes an interleaved set of the DRAM module and details of a socket, slot, and channel of the DRAM module; and   obtaining a physical memory map for the DRAM module, wherein the DRAM module is identified using the memory information and the physical memory map.   
     
     
         12 . The method of  claim 10 , further comprising:
 receiving a memory replacement initiation request;   transmitting a request to firmware of the computing device to reprogram DRAM module memory training data to a replacement DRAM module;   initializing the replacement DRAM module inserted into the computing device using the DRAM module memory training data;   transmitting the freeze instructions to the virtual machine manager to pause the virtual machines executing on the computing device;   transferring memory data from the spare memory module to the replacement DRAM module;   remapping memory addresses from the spare memory module to the replacement DRAM module; and   transmitting the unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device.   
     
     
         13 . The method of  claim 12 , further comprising transmitting a shutdown request to the spare memory module, wherein the shutdown request places the spare memory module in a removable state. 
     
     
         14 . The method of  claim 10 , wherein the spare memory module is a peripheral component interlink express compatible device, wherein the spare memory module comprises a memory capacity at least equal to a capacity of the DRAM module, and wherein the spare memory module comprises a set of compute express link instructions. 
     
     
         15 . At least one non-transitory machine-readable medium comprising instructions for live dynamic random-access memory recovery that, when executed by at least one processor, cause the at least one processor to perform operations to:
 detect that a spare memory module has been inserted into a hot-pluggable interface of a computing device that is in an operational state based on a signal transmitted from logic contained in the spare memory module upon insertion into the hot-pluggable interface, wherein the hot-pluggable interface enables power on of the spare memory module upon insertion subsequent to an initial boot sequence of the computing device, and wherein the signal is transmitted upon power on of the spare memory module;   initialize the spare memory module;   receive an indication of a predicted failure of a dynamic random-access memory (DRAM) module of the computing device, the indication received before actual failure of the DRAM module;   transmit freeze instructions to a virtual machine manager to pause virtual machines executing on the computing device;   transfer memory data from the DRAM module to the spare memory module;   remap memory addresses from the DRAM module to the spare memory module; and   transmit unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device.   
     
     
         16 . The at least one non-transitory machine-readable medium of  claim 15 , further comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to:
 obtain memory information from firmware of the computing device, wherein the memory information includes an interleaved set of the DRAM module and details of a socket, slot, and channel of the DRAM module; and   obtain a physical memory map for the DRAM module, wherein the DRAM module is identified using the memory information and the physical memory map.   
     
     
         17 . The at least one non-transitory machine-readable medium of  claim 15 , the instructions to transfer the memory data from the DRAM module to the spare memory module further comprising instructions to mirror an interleaved set of the DRAM module to the spare memory module. 
     
     
         18 . The at least one non-transitory machine-readable medium of  claim 15 , further comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to:
 receive a memory replacement initiation request;   transmit a request to firmware of the computing device to reprogram DRAM module memory training data to a replacement DRAM module;   initialize the replacement DRAM module inserted into the computing device using the DRAM module memory training data;   transmit the freeze instructions to the virtual machine manager to pause the virtual machines executing on the computing device;   transfer memory data from the spare memory module to the replacement DRAM module;   remap memory addresses from the spare memory module to the replacement DRAM module; and   transmit the unfreeze instructions to the virtual machine manager to resume the virtual machines executing on the computing device.   
     
     
         19 . The at least one non-transitory machine-readable medium of  claim 18 , further comprising instructions that, when executed by the at least one processor, cause the at least one processor to perform operations to transmit a shutdown request to the spare memory module, wherein the shutdown request places the spare memory module in a removable state. 
     
     
         20 . The at least one non-transitory machine-readable medium of  claim 15 , wherein the spare memory module is a peripheral component interlink express compatible device, wherein the spare memory module comprises a memory capacity at least equal to a capacity of the DRAM module, and wherein the spare memory module comprises a set of compute express link instructions.