Quantum device

Abstract

A quantum device includes a first quantum chip, a second quantum chip, and one or more interposer substrates mounting the first quantum chip and the second quantum chip. The first quantum chip and the second quantum chip mounted on a same or different interposer substrates, have surfaces with at least partial regions thereof opposing each other, and electrical connection is made between opposing connection terminals arranged in at least partial regions of the surfaces, opposed to each other, of the first quantum chip and the second quantum chip.

What is claimed is: 
     
         1 . A quantum device comprising:
 a first quantum chip;   a second quantum chip; and   one or more interposer substrates mounting the first quantum chip and the second quantum chip,   wherein the first quantum chip and the second quantum chip mounted on a same interposer substrate or different interposer substrates, have surfaces with at least partial regions thereof opposed to each other,   the first quantum chip and the second quantum chip including mutually opposing connection terminals arranged respectively in the at least partial regions of the surfaces, opposed to each other, of the first quantum chip and the second quantum chip, the mutually opposing connection terminals of the first quantum chip and the second quantum chip electrically connected,   wherein the first quantum chip and the second quantum chip each include the connection terminal in the partial region in the surface identical with a first surface including a wiring plane for at least one qubit circuit thereon,   wherein the interposer substrate includes a first interposer substrate and a second interposer substrate mounting the first quantum chip and the second quantum chip, respectively,   wherein the first quantum chip is mounted on the first interposer substrate with at least one side edge of the first quantum chip protruded more than a side edge of the first interposer substrate,   the partial region of the first surface of the first quantum chip protruded more than the side edge of the first interposer substrate, facing with the partial region of the first surface of the second quantum chip, and   electrical connection is made between one or a plurality of connection terminals provided in the partial region of the first surface of the first quantum chip protruded more than the side edge of the first interposer substrate, and one or a plurality of connection terminals provided in the partial region of the first surface of the second quantum chip, the partial region of the second quantum chip facing with the partial region of the first quantum chip.   
     
     
         2 . The quantum device according to  claim 1 , wherein the first quantum chip is mounted on the first interposer substrate with the first surface down,
 the second quantum chip is mounted on the second interposer substrate mounted on the second interposer substrate with a second surface down, the second surface opposite to the first surface,   the connection terminal provided in the partial region of the first surface of the first quantum chip, and   the connection terminal provided in the partial region of the first surface of the second quantum chip and electrically connected to the connection terminal provided in the partial region of the first surface of the first quantum chip are located at a same location in a plane and opposed to each other up and down.   
     
     
         3 . The quantum device according to  claim 1 , wherein electrical connection of the mutually opposing one or a plurality of pairs of the connection terminals of the first and second quantum chips includes at least one of:
 a wired connection by a conductive member;   a wireless connection by capacitive coupling or inductor coupling; and a mixture of the wired connection and the wireless connection.   
     
     
         4 . The quantum device according to  claim 1 , wherein at least one of the first and second quantum chips includes one or a plurality of connection terminals opposing one or a plurality of connection terminals of the interposer substrate on which the at least one of the first and second quantum chips is mounted, electrically connected to the one or the plurality of connection terminals of the interposer substrate in a connection form including:
 a wired connection by a conductive member;   a wireless connection by capacitive coupling or inductor coupling; and   a mixture of the wired connection and the wireless connection.   
     
     
         5 . The quantum device according to  claim 1 , wherein at least one of the first and second quantum chips has at least one corner out of four corners cut. 
     
     
         6 . A quantum device comprising:
 a first quantum chip;   a second quantum chip; and   one or more interposer substrates mounting the first quantum chip and the second quantum chip,   wherein the first quantum chip and the second quantum chip mounted on a same interposer substrate or different interposer substrates, have surfaces with at least partial regions thereof opposed to each other,   the first quantum chip and the second quantum chip including mutually opposing connection terminals arranged respectively in the at least partial regions of the surfaces, opposed to each other, of the first quantum chip and the second quantum chip, the mutually opposing connection terminals of the first quantum chip and the second quantum chip electrically connected,   wherein the first quantum chip and the second quantum chip each include the connection terminal in the partial region in the surface identical with a first surface including a wiring plane for at least one qubit circuit thereon,   wherein the interposer substrate includes a first interposer substrate and a second interposer substrate mounting the first quantum chip and the second quantum chip, respectively, the quantum device further comprising:   a lid chip arranged opposite to the first surface of the second quantum chip, the first surface of the second quantum chip including the partial region opposing the partial region of the first surface of the first quantum chip, the lid chip covering a part or all of an area of the first surface other than the partial region of the second quantum chip opposing the partial region of the first surface of the first quantum chip, the lid chip including a ground plane on a surface facing with the first surface of the second quantum chip.   
     
     
         7 . A quantum device comprising:
 a first quantum chip;   a second quantum chip; and   one or more interposer substrates mounting the first quantum chip and the second quantum chip,   wherein the first quantum chip and the second quantum chip mounted on a same interposer substrate or different interposer substrates, have surfaces with at least partial regions thereof opposed to each other,   the first quantum chip and the second quantum chip including mutually opposing connection terminals arranged respectively in the at least partial regions of the surfaces, opposed to each other, of the first quantum chip and the second quantum chip, the mutually opposing connection terminals of the first quantum chip and the second quantum chip electrically connected,   wherein the first quantum chip and the second quantum chip each include the connection terminal provided on at least a side surface of each of the first quantum chip and the second quantum chip,   wherein the side surface of at least one of the first quantum chip and the second quantum chip includes a concave portion and a convex portion, on each of which the connection terminal is provided.   
     
     
         8 . The quantum device according to  claim 7 , wherein the first quantum chip and the second quantum chip are mounted on a same interposer substrate, the connection terminal on the side surface of the first quantum chip and the connection terminal on the side surface of the second quantum chip are positioned opposed to each other. 
     
     
         9 . The quantum device according to  claim 7 , wherein at least one of the first quantum chip and the second quantum chip includes at least two protruding portions on a side surface of the substrate of the quantum chip, the two protruding portions disposed apart from each other, the at least one of the first quantum chip and the second quantum chip including the connection terminal provided at a region between the two protruding portions and the connection terminal provided at the protruding portion, on the side surface. 
     
     
         10 . The quantum device according to  claim 9 , wherein the at least one of the first quantum chip and the second quantum chip includes a signal terminal as the connection terminal provided at the region between the two protruding portions on the side surface and a ground terminal as the connection terminal provided at the protruding portions, on the side surface, the signal terminal arranged between the ground terminals, the mutually opposing ground terminals on the side surfaces of the first quantum chip and the second quantum chip connected by a wired connection, while the mutually opposing signal terminals on the side surfaces of the first quantum chip and the second quantum chip connected by a wireless connection. 
     
     
         11 . The quantum device according to  claim 7 , wherein the connection terminal of at least one of the first quantum chip and the second quantum chip includes a superconducting metal formed on a sidewall of a trench opened on a surface of a region of a scribe line in a direction along the side surface on a wafer on which the at least one of the first and second quantum chips is formed. 
     
     
         12 . The quantum device according to  claim 7 , wherein the connection terminal of at least one of the first chips and the second quantum chip includes a portion of a superconducting metal filled in a via hole opened on a surface of a region of a scribe line in a direction along the side surface of at least one of the first chips and the second quantum chip on a wafer on which the at least one of the first and second quantum chips is formed. 
     
     
         13 . The quantum device according to  claim 12 , wherein at least one of the first chips and the second quantum chip includes the connection terminal including the superconducting metal formed as a convex structure on the side surface at a portion corresponding to a location the via hole which is cut along the scribe line in a dicing process of the wafer, the convex structure formed at least by depositing a superconducting metal on a cut surface of the via hole.