Technique for sharing context among multiple threads

Abstract

Apparatuses, systems, and techniques to execute programs in a single hardware context on a graphics processing unit (GPU). In at least one embodiment, resource management patches expressed in library or executable code are applied to one or more kernels to ensure execution in a shared context on a GPU.

What is claimed is: 
     
         1 . A processor comprising:
 one or more circuits to cause a compiler to insert one or more instructions into a first software program to control access to one or more computing resources by a second software program, wherein the one or more instructions, when executed, indicate a priority of execution, the priority of execution usable by one or more schedulers of a graphics processing unit (GPU) to execute the first software program and the second software program.   
     
     
         2 . The processor of  claim 1 , wherein the one or more instructions, if executed, cause a context to be shared by the first software program and the second software program. 
     
     
         3 . The processor of  claim 1 , wherein the one or more instructions, if executed, cause one or more execution units of a parallel processing unit (PPU) to stop execution of the first software program and start execution of the second software program. 
     
     
         4 . The processor of  claim 1 , wherein the one or more instructions, if executed, cause memory to be configured by one or more execution units of a parallel processing unit (PPU), the memory to be used by the second software program. 
     
     
         5 . The processor of  claim 1 , wherein the one or more instructions, if executed, cause one or more execution units of a parallel processing unit (PPU) to lock one or more memory regions to be used by the second software program. 
     
     
         6 . The processor of  claim 1 , wherein the one or more instructions, if executed, cause a third program to set a priority value in a shared memory for the first software program and the second software program, the priority value indicating an order of execution to be used by the one or more schedulers to determine when the first software program and the second software program are to be executed by a parallel processing unit. 
     
     
         7 . The processor of  claim 1 , wherein the first software program and the second software program are to be executed by one or more execution units of a parallel processing unit (PPU). 
     
     
         8 . The processor of  claim 1 , wherein the one or more instructions are object code to be performed by one or more parallel processing units (PPUs). 
     
     
         9 . A system, comprising memory to store instructions that, as a result of execution by one or more processors, cause the system to:
 insert one or more instructions into a first software program by a compiler to modify the first software program to control access to one or more computing resources by a second software program, wherein the one or more instructions are to set a priority value indicative of a priority for one or more execution units of a parallel processing unit (PPU) to perform the first software program and the second software program.   
     
     
         10 . The system of  claim 9 , wherein the first software program and the second software program are persistent kernels to be executed by the one or more execution units of the (PPU). 
     
     
         11 . The system of  claim 9 , wherein the one or more instructions, if executed, cause one or more memories for the one or more execution units of the (PPU) to be configured for use by the second software program. 
     
     
         12 . The system of  claim 9 , wherein the one or more instructions, if executed, cause one or more execution units of the (PPU) to begin execution of the second software program during execution of the first software program. 
     
     
         13 . The system of  claim 9 , wherein the first software program and the second software program are to be executed by one or more execution units of the (PPU), based, at least in part, on the one or more instructions. 
     
     
         14 . The system of  claim 9 , wherein the one or more instructions, if executed, cause a shared memory and at least one execution unit of the (PPU) to be shared. 
     
     
         15 . A machine-readable medium having stored thereon a set of instructions, which if performed by one or more processors, cause the one or more processors to at least:
 insert one or more instructions into a first software program by a compiler to control access to one or more computing resources by a second software program, wherein the one or more instructions, when executed, set a priority value indicating a priority for one or more execution units of a parallel processing unit (PPU) to perform the first software program and the second software program.   
     
     
         16 . The machine-readable medium of  claim 15 , further comprising instructions that, if performed by the one or more processors, cause the one or more processors to indicate an order of execution, the order of execution usable by one or more schedulers of a parallel processing unit (PPU) to execute the first software program and the second software program. 
     
     
         17 . The machine-readable medium of  claim 15 , wherein the one or more instructions, if executed, cause a context to be shared by the first software program and the second software program, the context comprising a one or more execution units of a parallel processing unit (PPU). 
     
     
         18 . The machine-readable medium of  claim 15 , wherein the one or more instructions, if executed, allow the second software program to be executed by one or more execution units of a parallel processing unit (PPU) as a result of the first software program being executed by the one or more execution units of the PPU. 
     
     
         19 . The machine-readable medium of  claim 15 , wherein the one or more instructions, if executed, cause the second software program to be loaded into memory and executed by the one or more execution units of the parallel processing unit (PPU). 
     
     
         20 . The machine-readable medium of  claim 15 , wherein the first software program and the second software program are persistent kernels to be executed by one or more execution units of a parallel processing unit (PPU). 
     
     
         21 . A machine-readable medium having stored thereon a set of executable instructions that when executed by one or more processors of a computer system, cause the computer system to at least:
 insert one or more instructions into a first software program by a compiler to control access to one or more computing resources by a second software program; and   set a priority value indicating an order for one or more execution units of a parallel processing unit (PPU) to perform the first software program and the second software program; and   cause one or more execution units of the parallel processing unit (PPU) to lock one or more memory regions to be usable by the first software program or the second software program.   
     
     
         22 . A method comprising:
 inserting one or more instructions into a first software program by a compiler to control access to one or more computing resources by a second software program, wherein the one or more instructions are to be performed to indicate a priority of execution usable by one or more schedulers of a graphics processing unit (GPU) to execute the first software program and the second software program.   
     
     
         23 . The method of  claim 22 , further comprising causing, in response to executing the one or more instructions, a context to be shared by the first software program and the second software program, the context comprising a shared memory and one or more execution units of a parallel processing unit (PPU). 
     
     
         24 . The method of  claim 22 , further comprising performing the first software program and the second software program using an execution unit of a parallel processing unit (PPU). 
     
     
         25 . The method of  claim 22 , wherein the first software program and the second software program are to be performed by a multi-process service (MPS) comprising at least one execution unit of a parallel processing unit (PPU). 
     
     
         26 . The method of  claim 22 , further comprising setting a priority value in memory usable by a parallel processing unit (PPU), the priority value indicating an order for executing the first software program and the second software program by one or more execution units of the PPU. 
     
     
         27 . The method of  claim 22 , wherein the one or more instructions being inserted into the first software program by the compiler are to perform one or more library functions of an application programming interface (API) for a parallel computing platform. 
     
     
         28 . The method of  claim 22 , further comprising causing, by the one or more instructions, memory to be configured by one or more execution units of a parallel processing unit (PPU), the memory to be used by the second software program. 
     
     
         29 . One or more processors, comprising:
 circuitry to cause a compiler to insert one or more instructions into a first software program to control access to one or more computing resources by a second software program, wherein the one or more instructions, when executed, indicate an order of execution usable by one or more schedulers to execute the first software program and the second software program, wherein the one or more instructions, if executed, cause a context to be shared by the first software program and the second software program, the context comprising a shared memory and one or more execution units of a parallel processing unit (PPU).   
     
     
         30 . One or more processors, comprising:
 circuitry to cause a compiler to insert one or more instructions into a first software program to control access to one or more computing resources by a second software program, wherein the one or more instructions, when executed, indicate an order of execution usable by one or more schedulers to execute the first software program and the second software program, wherein the one or more instructions, if executed, cause one or more execution units of a parallel processing unit (PPU) to stop execution of the first software program by the one or more execution units and start execution of the second software program by the one or more execution units.