Method for producing a semiconductor device
Abstract
A producing method of the present invention includes (i) forming a wiring line above a semiconductor substrate, (ii) forming an insulating layer above the semiconductor substrate and the wiring line, (iii) forming an opening penetrating the insulating layer in the insulating layer with respect to a portion above the wiring line, (iv) forming a barrier layer whose surface is formed of a material A, so as to cover a surface of the insulating layer and an inner surface of the opening, (v) forming a metal layer made of a first metal on the barrier layer, and (vi) depositing a second metal inside the opening by a plating, thus forming a via plug containing the second metal. A rest potential P A of the material A with respect to the second metal is larger than a rest potential P M of the first metal with respect to the second metal.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for producing a semiconductor device comprising processes of:
(i) forming a wiring line above a semiconductor substrate; (ii) forming an insulating layer above the semiconductor substrate and the wiring line; (iii) forming an opening penetrating the insulating layer in the insulating layer with respect to a portion above the wiring line; (iv) forming a barrier layer whose surface is formed of a material A, so as to cover a surface of the insulating layer and an inner surface of the opening; (v) forming a metal layer made of a first metal on the barrier layer; and (vi) depositing a second metal inside the opening by a plating, thus forming a via plug containing the second metal; wherein a rest potential P A of the material A with respect to the second metal is larger than a rest potential P M of the first metal with respect to the second metal.
2 . The method according to claim 1 , wherein the barrier layer comprises a first layer and a second layer formed on the first layer; the second layer being made of the material A, and the first layer being made of a material B that has a smaller diffusion coefficient for the first metal and the second metal than the material A.
3 . The method according to claim 1 , wherein the plating is an electroplating, and in the process (v), the metal layer is formed in a portion above the insulating layer and at a bottom of the opening alone.
4 . The method according to claim 1 , wherein the material A is metal nitride, and the method further comprises a process of nitriding a surface of the barrier layer after the process (iv) and before the process (v).
5 . The method according to claim 1 , wherein the first metal and the second metal are copper.
6 . The method according to claim 1 , wherein the material A is titanium nitride.
7 . The method according to claim 6 , wherein the material B is tantalum or tantalum nitride.Join the waitlist — get patent alerts
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