Data pack structure

Abstract

A bridge accessible by a host processor can expand access over a first bus to a second bus. The first bus and the second bus are each adapted to separately connect to respective ones of a plurality of bus-compatible devices. Allowable ones of the devices include memory devices and input/output devices. The bridge has a link, together with a first and a second interface. The first interface is coupled between the first bus and the link. The second interface is coupled between the second bus and the link. The first interface and the second interface are operable to (a) send information serially through the link in a format different from that of the first bus and the second bus, (b) approve an initial exchange between the first bus and the second bus in response to pending transactions having a characteristic signifying a destination across the bridge, (c) exchange information between the first bus and the second bus according to a predetermined hierarchy giving the first bus a higher level than the second bus, and (d) allow the host processor, communicating through the first bus, to individually address different selectable ones of the bus-compatible devices on the second bus, including memory devices and input/output devices that may be present: (i) using on the first bus substantially the same type of addressing as is used to access devices the first bus, and (ii) without first employing a second, intervening one of the bus-compatible devices on the second bus.

We claim:  
     
         1 . A data organization according to a 38-bit coding scheme that enables the expanding a computer system, the coding scheme comprising: 
 36 reserved bits; and    2 tag bits.    
     
     
         2 . The coding scheme of  claim 1  wherein the 2 tag bits identify the nature of the transaction.  
     
     
         3 . The coding scheme of  claim 2  wherein the 2 tag bits identify an address cycle.  
     
     
         4 . The coding scheme of  claim 2  wherein the 2 tag bits identify an acknowledgement of a non-posted write.  
     
     
         5 . The coding scheme of  claim 2  wherein the 2 tag bits identify a data burst.  
     
     
         6 . The coding scheme of  claim 2  wherein the 2 tag bits identify an end of data burst.  
     
     
         7 . The coding scheme of  claim 2  wherein the 2 tag bits identify a single cycle.  
     
     
         8 . The coding scheme of  claim 1  wherein the coding scheme enables an outgoing write transaction.  
     
     
         9 . The coding scheme of  claim 8  wherein the outgoing write transaction is a single cycle transaction.  
     
     
         10 . The coding scheme of  claim 8  wherein the outgoing write transaction is part of a burst.  
     
     
         11 . The coding scheme of  claim 1  wherein the coding scheme enables an outgoing read request.  
     
     
         12 . The coding scheme of  claim 11  wherein the outgoing read request is part of a burst.  
     
     
         13 . The coding scheme of  claim 12  wherein the part of the burst has a sequence of byte enabled codes for each successive read cycle of the burst.  
     
     
         14 . A register containing a data structure organized according to a 38-bit coding scheme that enables the expanding a computer system, the coding scheme comprising: 
 36 reserved Pits; and    2 tag bits.    
     
     
         15 . The register of  claim 14  wherein the data structure comprises an outgoing write transaction.  
     
     
         16 . The register of  claim 14  wherein the data structure comprises an outgoing read request.  
     
     
         17 . The register of  claim 14  wherein the data structure comprises an outgoing read request as part of a burst having a sequence of byte enabled codes for each successive read cycle of the burst.  
     
     
         18 . A means for storing a data structure organized according to a 38-bit coding scheme that enables the expanding a computer system, the coding scheme comprising: 
 36 reserved bits; and    2 tag bits.    
     
     
         19 . The means of  claim 18  wherein the data structure comprises an outgoing write transaction.  
     
     
         20 . The means of  claim 18  wherein the data structure comprises an outgoing read request.  
     
     
         21 . A data organization according to a 40-bit coding scheme that enables the expanding a computer system, the coding scheme comprising: 
 36 reserved bits;    2 tag bits; and    2 extra bits.    
     
     
         22 . The data organization of  claim 21  wherein the 2 extra bits signify an interrupt.  
     
     
         23 . The data organization of  claim 21  wherein the 2 extra bits signify a status signal.  
     
     
         24 . The data organization of  claim 21  wherein the 2 extra bits signify an error signal.