Method of making SiC semiconductor devices with W/WC/TaC contacts

Abstract

Ohmic and rectifying contacts to a TaC layer on an n-type or p-type area of an SiC substrate are formed by depositing a WC layer over the TaC layer, followed by a metallic W layer. Such contacts are stable to at least 1150° C. Electrodes connect to the contacts either directly or via a protective bonding layer such as Pt or PtAu alloy through a dielectric layer.

1 . A SiC semiconductor device comprising: 
 a semiconductor substrate comprising silicon carbide having a first surface and a second surface, the substrate including a first doped region adjacent the first surface and a second doped region adjacent the second surface;    a first conductive layer comprising a first contact metal layer on the first surface to form a first contact having an electronic interface to the first region; and    a second conductive layer contacting the second surface to form a second electronic contact to the substrate, the second layer including: 
 a tantalum carbide (TaC) layer contacting the second surface;  
 a tungsten carbide (WC) layer covering the tantalum carbide (TaC) layer; and  
 a layer consisting essentially of elemental tungsten contacting the tungsten carbide (WC) layer.  
   
     
     
         2 . A SiC semiconductor device according to  claim 1  in which the second region is doped n-type, and the second contact forms an ohmic junction.  
     
     
         3 . A SiC semiconductor device according to  claim 1  including a layer of a bonding metal contacting the tungsten layer, selected from a group of conductive metals that is adapted to bond to a tungsten surface.  
     
     
         4 . A SiC semiconductor device according to  claim 1  including a layer of a bonding metal contacting the tungsten layer, the bonding metal being selected from a group consisting of Pt, Pd, W, Au, PtAu, V, Ti, Zr, Hf, Cr, Fe, Ni, Cu, Nb, Mo, Tc, Ru, Rh, Ag, Ta, Re, Ir.  
     
     
         5 . A SiC semiconductor device according to  claim 1  in which the second region is doped p-type, and the second contact forms a rectifying junction.  
     
     
         6 . A SiC semiconductor device according to  claim 1  in which the first layer includes: 
 a tantalum carbide (TaC) layer on the first surface;  
 a tungsten carbide (WC) layer on the tantalum carbide (TaC) layer; and  
 a metallic tungsten (W) layer on the tungsten carbide (WC) layer.  
 
     
     
         7 . A SiC semiconductor device according to  claim 6  in which the first and second regions and intervening portions of the substrate are doped n-type so that the first contacts and the second contact each form an ohmic junction and the device acts as a resistive device.  
     
     
         8 . A SiC semiconductor device according to  claim 6  in which the first and second regions are doped n-type and a contact is coupled to an intervening portion of the substrate, the contact including a third conductive layer overlying an insulative layer to form an insulated gate over the intervening portion so that the device is operable as a field effect transistor.  
     
     
         9 . A SiC semiconductor device according to  claim 8  in which the conductive layer overlying the insulative layer includes: 
 a tantalum carbide (TaC) layer on the insulative surface;  
 a tungsten carbide (WC) layer on the tantalum carbide (TaC) layer; and  
 a metallic tungsten (W) layer on the tungsten carbide (WC) layer.  
 
     
     
         10 . A SiC semiconductor device according to  claim 8  in which the conductive layer overlying the insulative layer includes a layer of Os contacting the insulative layer.  
     
     
         11 . A SiC semiconductor device according to  claim 7  in which the first and second regions are doped n-type and a contact is coupled to an intervening portion of the substrate, the contact including a conductive layer contacting a surface of the intervening portion so that the device is operable as a transistor.  
     
     
         12 . A SiC semiconductor device according to  claim 11  in which the conductive layer includes: 
 a tantalum carbide (TaC) layer on the surface of the intervening portion;  
 a tungsten carbide (WC) layer on the tantalum carbide (TaC) layer; and  
 a metallic tungsten (W) layer on the tungsten carbide (WC) layer.  
 
     
     
         13 . A SiC semiconductor device according to  claim 11  in which the conductive layer includes a layer of Os contacting the surface of the intervening region.  
     
     
         14 . A SiC semiconductor device according to  claim 11  in which the intervening portion of the substrate is doped p-type so that the device is operable as a bipolar transistor.  
     
     
         15 . A SiC semiconductor device according to  claim 11  in which intervening portion of the substrate is doped n-type so that the device is operable as a MESFET.  
     
     
         16 . A SiC semiconductor device according to  claim 6  including a contact coupled to an intervening portion of the substrate so that the device acts as a transistor.  
     
     
         17 . A SiC semiconductor device according to  claim 16  in which the gate contact material includes a third conductive layer overlying an insulative layer to form an insulated gate over the intervening portion so that the device acts as a field effect transistor.  
     
     
         18 . A SiC semiconductor device according to  claim 1  in which the first region is doped p-type and the first conductive layer is formed of a material suitable to form an ohmic contact with the first region, the second region is doped n-type to form an ohmic contact to the second layer, and the substrate includes a first n-type intervening portion adjoining the region and a second p-type intervening portion adjoining the second region of the substrate so as to define a four-layer device having three pn junctions electrically coupled between said first and second conductive layers.  
     
     
         19 . A SiC semiconductor device according to  claim 18  including a third conductive layer contacting a surface of one of the intervening portions.  
     
     
         20 . A SiC semiconductor device according to  claim 19  in which the third conductive layer comprises one of an Os layer and a TaC/WC/W layer.  
     
     
         21 . A SiC semiconductor device according to  claim 18  in the third conductive layer is capacitively coupled to a surface of one of the intervening portions.  
     
     
         22 . A SiC semiconductor device according to  claim 21  in which the third conductive layer comprises one of an Os layer and a TaC/WC/W layer.  
     
     
         23 . A method of forming an electrical contact to a surface of SiC semiconductor substrate comprising: 
 depositing a tantalum carbide (TaC) layer on an area of the substrate surface to form a contact having an electronic interface to the substrate;    depositing a tungsten carbide (WC) layer on the tantalum carbide (TaC) layer; and    depositing a metallic tungsten (W) layer on the tungsten carbide (WC) layer.    
     
     
         24 . A method according to  claim 23  including doping a portion of the substrate in said area with an n-type impurity so that the TaC/WC/W layer and the n-type doped substrate portion form an ohmic junction.  
     
     
         25 . A method according to  claim 23  including doping a portion of the substrate in said area with a p-type impurity so that the TaC/WC/W layer and the p-type doped substrate portion form a rectifying junction.  
     
     
         26 . A method according to  claim 23  including annealing the substrate during or after deposition of the W layer to bond the W layer to the WC layer.  
     
     
         27 . A method according to  claim 23  including annealing the substrate during or after deposition of TaC layer to densify the TaC layer before deposition of the WC layer.  
     
     
         28 . A method according to  claim 23  in which the TaC, WC and W layers are successively deposited on the substrate surface and then patterned to delimit the area of contact.  
     
     
         29 . A method according to  claim 28  including forming an insulative layer over the W/WC/TaC contact and an adjoining portion of the SiC substrate surface.