Salicide formation process

Abstract

A method of making a semiconductor device including a MOS transistor provides an insulator formed on a semiconductor substrate and a gate electrode formed on the insulator. Source/drain regions are formed within the substrate on either side of the gate electrode. A layer of titanium is sputtered onto the semiconductor device, and a layer of titanium nitride is direct sputtered over the titanium layer using a titanium nitride target. The device is annealed at a first temperature to form a structure including titanium silicide on the polysilicon electrode, titanium silicide on the surface of the source/drain regions, unreacted titanium over the silicide regions, and titanium nitride over the unreacted metal. The unreacted titanium and titanium nitride are removed from the structure, and the structure is annealed at a higher temperature than the first temperature to form a lower resistivity titanium silicide.

What is claimed:  
     
         1 . A method of forming a self-aligned silicide structure comprising the steps of: 
 forming a structure including a layer of titanium over a surface of a polysilicon gate electrode and over source/drain regions in a substrate;    direct sputtering a layer of titanium nitride over the layer of titanium using a titanium nitride target material;    annealing the structure at a first temperature to form titanium silicide on the polysilicon gate electrode and titanium silicide on the source/drain regions; and    removing the titanium nitride from the structure.    
     
     
         2 . The method of  claim 1 , wherein a layer of unreacted titanium remains in the structure after annealing the structure at the first temperature and prior to the step of removing the titanium nitride.  
     
     
         3 . The method of  claim 1 , further comprising the step of removing any unreacted titanium from the structure after annealing the structure at the first temperature to form titanium silicide.  
     
     
         4 . The method of  claim 3 , further comprising the step of annealing the structure at a second temperature after removing the titanium nitride and any unreacted titanium, wherein the second temperature is greater than the first temperature.  
     
     
         5 . The method of  claim 1 , wherein the direct sputtering of the layer of titanium nitride is carried out with the substrate held at a temperature of approximately 300° C.  
     
     
         6 . The method of  claim 1 , wherein the substrate is held at a temperature of approximately 300° C. during the formation of the layer of titanium.  
     
     
         7 . The method of  claim 6 , wherein the substrate is held at a temperature of approximately 300° C. during the direct sputtering of the layer of titanium nitride.  
     
     
         8 . The method of  claim 1 , wherein the direct sputtering of the layer of titanium nitride is carried out with the substrate held at approximately room temperature.  
     
     
         9 . The method of  claim 1 , wherein the substrate is held at approximately room temperature during the formation of the layer of titanium.  
     
     
         10 . The method of  claim 9 , wherein the substrate is held at approximately room temperature during the direct sputtering of the layer of titanium nitride.  
     
     
         11 . The method of  claim 1 , wherein the layer of titanium nitride is approximately 100 Å thick.  
     
     
         12 . A method of making a semiconductor device including a MOS transistor, the method of making the MOS transistor comprising the steps of: 
 forming an insulator on a semiconductor substrate;    forming a gate electrode on the insulator;    forming source/drain regions within the substrate on either side of the gate electrode;    direct sputtering a titanium layer on the semiconductor device;    direct sputtering a layer of nitride over the titanium layer, annealing the device at a first temperature to form a structure including titanium silicide on the polysilicon electrode, titanium silicide on the surface of the source/drain regions, unreacted titanium over the silicide regions, and titanium nitride over the unreacted titanium;    removing unreacted titanium and titanium nitride from the structure; and    annealing the structure at a higher temperature than the first temperature to form a lower resistivity titanium silicide.    
     
     
         13 . The method of  claim 12 , wherein the direct sputtering of the layer of titanium nitride is carried out with the substrate held at a temperature of approximately 300° C.  
     
     
         14 . The method of  claim 12 , wherein the direct sputtering of the titanium layer is carried out with the substrate held at a temperature of approximately 300° C.  
     
     
         15 . The method of  claim 14 , wherein the substrate is held at a temperature of approximately 300° C. during the direct sputtering of the layer of titanium nitride.  
     
     
         16 . The method of  claim 12 , wherein the direct sputtering of the layer of titanium nitride is carried out with the substrate held at approximately room temperature.  
     
     
         17 . The method of  claim 12 , wherein the direct sputtering of the titanium layer is carried out with the substrate held at approximately room temperature.  
     
     
         18 . The method of  claim 12 , wherein the layer of titanium nitride is approximately 100 Å thick.  
     
     
         19 . A method of forming a self-aligned silicide structure comprising the steps of: 
 forming a structure including a layer of titanium over a gate electrode and over source/drain regions in a substrate;    sputtering a layer of titanium nitride over the layer of titanium using a titanium nitride target in an inert atmosphere; and    annealing the structure at a first temperature to form titanium silicide on the polysilicon electrode and titanium silicide on the source/drain regions.    
     
     
         20 . The method of claim  20 , wherein the inert atmosphere comprises argon.