Ground via structures in semiconductor packages

Abstract

A package for a semiconductor chip is provided. The package includes a ground conducting layer. A one metal layer interconnect substrate is attached to the ground conducting layer. The one metal layer interconnect substrate includes a via hole defining a path to the ground conducting layer. A conductive material substantially filling the path defined by the via hole is provided. The conductive material is in contact with the ground conducting layer.

What is claimed is:  
     
         1 . A package for a semiconductor chip, comprising: 
 a ground conducting layer;    a one metal layer interconnect substrate attached to the ground conducting layer, the one metal layer interconnect substrate having a via hole defining a path to the ground conducting layer; and    a conductive material substantially filling the path defined by the via hole, the conductive material being in contact with the ground conducting layer.    
     
     
         2 . A package for a semiconductor chip as recited in  claim 1 , wherein the conductive material is one of a solder ball, a solder paste, and conductive paste.  
     
     
         3 . A package for a semiconductor chip as recited in  claim 2 , further comprising: 
 a solder ball defined over the conductive material.    
     
     
         4 . A package for a semiconductor chip, comprising: 
 a substrate capable of conducting a ground;    a single metal layer interconnect substrate attached to the substrate, the one metal layer interconnect substrate having a via hole; and    a conductive material contained in the via hole, the conductive material being in contact with the substrate;    wherein the conductive material defines an electrical connection to the ground.    
     
     
         5 . A package for a semiconductor chip as recited in  claim 4 , wherein the conductive material is one of a solder ball, a solder paste, and conductive paste.  
     
     
         6 . A package for a semiconductor chip as recited in  claim 5 , further comprising: 
 a solder ball defined over the conductive material.    
     
     
         7 . A package for a semiconductor chip, comprising: 
 a substrate capable of conducting a ground;    a single metal layer interconnect substrate attached to the substrate, the one metal layer interconnect substrate having a via hole;    a conductive material contained in the via hole, the conductive material being in contact with the substrate; and    a solder ball defined over the conductive material;    wherein the conductive material defines an electrical connection to the ground.