Semiconductor package and mount board, and mounting method using the same

Abstract

The package-side land 3 a of a semiconductor package P 1 is wholly exposed into the opening 5 a of a solder resist layer 5. The board-side land 12 a of the mount board B 1 is also wholly exposed into the opening 13 a of a solder resist layer 13. When the semiconductor package P 1 and the mount board B 1 are joined to each other through a soldering layer 14 a, the soldering layer 14 a is brought into contact to both the lands 3 a and 12 a while extending to the side wall surfaces thereof so that the joint strength can be enhanced by the increasing contact area and the shape. When the lands 3 a and 12 a are set to be equal to each other in dimension and shape, the soldering layer 14 a is shaped into a pillar having a substantially uniform section, thereby preventing local concentration of stress. To ensure the joint strength based on a conductive material layer and enhance the mount reliability by making fine the terminals on a relay substrate which correspond to the input or output terminals of a semiconductor chip, and making the pitch narrow.

What is claimed is:  
     
         1 . A semiconductor package comprising: 
 a semiconductor chip having input or output terminals;    a relay board having; 
 package side lands being arranged on a principal plane thereof in association with said respective input or output terminals of said semiconductor chip, and;  
 a solder resist layer mutually insulating said package side lands adjacent to each other from each other and having openings having a larger area than the surface area of said package side lands so as to wholly expose each of said package side lands.  
   
     
     
         2 . A mount board comprising: 
 a base member;    board side lands being disposed on one principal plane of said base member in the same arrangement as package side lands of a semiconductor package to be mounted thereon: and    a solder resist layer mutually insulating said board side lands adjacent to each other from each other and having openings having a larger area than the surface area of said board side lands to wholly expose each of said board side lands.    
     
     
         3 . A mount board as claimed in  claim 2 , wherein the dimension and the shape of said board side lands are set to be substantially equal to those of the package side lands of said semiconductor package.  
     
     
         4 . A mounting method comprising the steps of: 
 providing a semiconductor package having a semiconductor chip having input or output terminals and a relay board having package side lands corresponding to said input or output terminals and being arranged on a principal plane thereof and a mount board having board side lands corresponding to said package side lands on a principal plane thereof, whereby at least one of said package side lands and said board side lands is wholly exposed in an opening of a solder resist layer having an opening area larger than the area of the surface of said lands;    electrically connecting said package side land with said board side land through a conductive material layer.