Method for evaluating an integrated electronic device

Abstract

The structure allows checking an integrated electronic device comprising an oxide layer to be measured located above a doped pocket of a wafer of doped semiconductor material and arranged adjacent to a gate region of polycrystalline semiconductor material. The structure is formed at a suitable point of the wafer and comprises an oxide test region of the same material, having the same thickness and the same electrical characteristics as the oxide layer to be measured and a polycrystalline region of the same material, having the same thickness and the same electrical characteristics as the gate region. The polycrystalline region extends preferably along the perimeter of a square and delimits laterally the oxide test region, the area of which is greater than the area of the oxide layer to be measured so as to allow non-destructive testing, on-line, of the oxide layer to be measured during an early stage of the manufacturing process.

1 . A method for checking of an integrated electronic device, comprising the steps of: 
 forming a first doped region in a first portion of a body of semiconductor material;    forming a first oxide region having a first area above said body;    forming a gate region of polycrystalline material above said body and extending at least over a portion of said first oxide region;    simultaneously with said step of forming a first doped region, forming a second doped region in a second portion of said body, said second doped region having the same type and conductivity level as said first doped region;    simultaneously with said step of forming a first oxide region, forming a second oxide region above said second doped region, said second oxide region having the same thickness and a greater area than said first oxide region;    simultaneously with said step of forming a gate region, forming a polycrystalline region located above said body and extending at least over a portion of said second oxide region;    measuring the oxide thickness of the layer that is overlaid by said polycrystalline region.    
     
     
         2 . A method according to  claim 1 , further comprising, after said steps of forming a gate region and simultaneously a polycrystalline region, performing the step of forming a first and a second re-oxidation region, said first re-oxidation region extending above and on the sides of said gate region and said second re-oxidation region extending above and on the sides of said polycrystalline region, so as to form, on the sides of said gate region, an oxide region to be measured including said first oxide region and said first re-oxidation region and, on the sides of said polycrystalline region, an oxide test region including said second oxide region or said second re-oxidation region, and wherein said measurement step comprises measuring the thickness of said oxide test region.  
     
     
         3 . A method of checking an integrated electronic device that includes an oxide layer located above a body of doped semiconductor material and arranged in a position adjacent to a gate region of polycrystalline semiconductor material, the oxide layer to be measured having a first area; a polycrystalline region of a same material as the gate region; and an oxide test region of a same material as the oxide layer and having a same thickness as the oxide layer and a second area greater than the first area, the method comprising measuring the thickness of the oxide test region and comparing the measured thickness to a predetermined threshold.  
     
     
         4 . The method of  claim 3  wherein the measuring step includes measuring the thickness of the oxide test region using an ellipsometer.  
     
     
         5 . The method of  claim 3  wherein the polycrystalline region extends along a closed line.  
     
     
         6 . The method of  claim 3  wherein the polycrystalline region extends along a perimeter of a regular quadrilateral.  
     
     
         7 . The method of  claim 3  wherein the regular quadrilateral is a square.  
     
     
         8 . The method of  claim 3  wherein the second area has dimensions greater than or equal to 50×50 μm 2 .  
     
     
         9 . The method of  claim 3  wherein the second area is at least 2500 times greater than the first area.  
     
     
         10 . The method of  claim 3 , further comprising discarding the device if the measured area is less than the predetermined threshold.