Method for forming polysilicon-filled trench isolations
Abstract
A method for forming polysilicon-filled trench isolations is provided. The present method is characterized in that using nitrogen implantation to amorphize the top portion of the polysilicon filled in the trench isolation and then a nitrogen-implanted region formed in this top portion. The nitrogen-implanted region forms an oxynitride cap layer during the polysilicon oxidation. The oxynitride cap layer provides better erosive resistance to acidic solutions for stripping away photopresist layers used for several wells/V th implantations than a silicon dioxide layer. The oxynitride cap layer also reduces the gate-to-channel fringing field because its dielectric constant is higher than that of silicon dioxide. Moreover, the nitrogen-implanted region in the top portion of the polysilicon decreases the polysilicon oxidation time so that the channel edge oxidation is reduced.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for forming polysilicon-filled trench isolation, comprising:
providing a silicon substrate having a pad dielectric layer formed thereon; forming a polishing stopping layer over said pad dielectric layer; anisotropically etching said polishing stopping layer, said pad dielectric layer and said silicon substrate to form a trench isolation in said silicon substrate; forming a liner layer over the surface of said trench isolation; forming a polysilicon layer over said polishing stopping layer and said liner layer; planarizing said polysilicon layer until exposing said polishing stopping layer; etching back a partial portion of said polysilicon layer; performing ion implantation to form an ion-implanted layer on said polysilicon layer; proceeding a first thermal oxidation so that said ion-implanted layer forms a cap oxide layer; and sequentially removing said polishing stopping layer and said pad dielectric layer.
2 . The method of claim 1 , wherein said pad dielectric layer comprises silicon dioxide.
3 . The method of claim 2 , wherein said pad dielectric layer of silicon dioxide is formed by way of a second thermal oxidation.
4 . The method of claim 1 , wherein said polishing stopping layer comprises silicon nitride.
5 . The method of claim 4 , wherein said polishing stopping layer of silicon nitride is formed by way of low pressure chemical vapor deposition method utilizing SiH 2 Cl 2 and NH 3 as the reaction gases at the temperature of about 700˜800° C. under the operation pressure of about 0.1˜1 torr.
6 . The method of claim 4 , wherein said polishing stopping layer of silicon nitride is formed by way of plasma enhanced chemical vapor deposition method utilizing SiH 4 , NH 3 and N 2 as the reaction gases at the temperature of about 250˜400° C. under the operation pressure of about 1˜5 torr.
7 . The method of claim 1 , wherein said liner layer comprises silicon dioxide.
8 . The method of claim 7 , wherein said liner layer of silicon dioxide is formed by way of a third thermal oxidation.
9 . The method of claim 1 , wherein said polysilicon layer is formed by way of low pressure chemical vapor deposition method utilizing SiH 4 as the reaction gas at the temperature of about 600˜650° C. under the operation pressure of about 0.3˜0.6 torr.
10 . The method of claim 1 , wherein said polysilicon layer is formed of in-situ N + polysilicon layer by way of low pressure chemical vapor deposition method utilizing SiH 4 and 1 Vol. % AsH 3 as the reaction gases.
11 . The method of claim 1 , wherein said polysilicon layer is planarized by way of chemical mechanical polishing method.
12 . The method of claim 1 , wherein said polysilicon layer is etched back by way of reactive ion etching method utilizing an etching gas selected from a group consisting of Cl 2 , HCl and SiCl 4 .
13 . The method of claim 1 , wherein said ion implantation is performed by way of nitrogen implantation.
14 . The method of claim 13 , wherein said nitrogen implantation is performed utilizing the gas source of N 2 with a dosage of about 5×10 14 ˜5×10 16 ions/cm 2 under an implanting energy of about 10 KeV.
15 . The method of claim 13 , wherein said nitrogen implantation is performed utilizing the gas source of NH 3 with a dosage of about 5×10 14 ˜5×10 16 ions/cm 2 under an implanting energy of about 10 KeV.
16 . The method of claim 1 , wherein said first thermal oxidation is proceeded by way of dry oxidation at the temperature of about 1000° C.
17 . The method of claim 2 , wherein said pad dielectric layer of silicon dioxide is removed by way of dip wet etch with aqueous HF solution.
18 . The method of claim 4 , wherein said polishing stopping layer of silicon nitride is removed by way of dip wet etch with aqueous H 3 PO 4 solution.
19 . A method for forming a polysilicon-filled trench isolation device, comprising:
providing a silicon substrate having a first silicon dioxide layer formed thereon; forming a silicon nitride layer on said first silicon dioxide layer as a polishing stopping layer; anisotropically etching said silicon nitride layer, said first silicon dioxide layer and said silicon substrate to form a trench isolation in said silicon substrate; forming a second silicon dioxide liner layer over the surface of said trench isolation; forming a polysilicon layer over said silicon nitride layer and said second silicon dioxide liner layer; planarizing said polysilicon layer until exposing said silicon nitride layer; etching back a partial portion of said polysilicon layer; performing a first ion implantation to form a nitrogen-implanted layer on said polysilicon layer; proceeding a first thermal oxidation so that said nitrogen-implanted layer forms an oxynitride cap layer; sequentially removing said silicon nitride layer and said first silicon dioxide layer; forming a photoresist layer over said silicon substrate and performing channel implantation; sequentially forming a gate oxide layer and a polysilicon gate layer on said silicon substrate; and proceeding a second ion implantation to form a source/drain beside each side of said polysilicon gate layer in said silicon substrate.
20 . The method of claim 19 , wherein said second silicon dioxide liner layer is formed by way of a second thermal oxidation.
21 . The method of claim 19 , wherein said polysilicon layer is formed by way of low pressure chemical vapor deposition method utilizing SiH 4 as the reaction gas at the temperature of about 600˜650° C. under the operation pressure of about 0.3˜0.6 torr.
22 . The method of claim 19 , wherein said polysilicon layer is formed of in-situ N + polysilicon layer by way of low pressure chemical vapor deposition method utilizing SiH 4 and 1 Vol. % AsH 3 as the reaction gases.
23 . The method of claim 19 , wherein said polysilicon layer is planarized by way of chemical mechanical polishing method.
24 . The method of claim 19 , wherein said polysilicon layer over said trench isolation is etched back by way of reactive ion etching method utilizing an etching gas selected from a group consisting of Cl 2 , HCl and SiCl 4 .
25 . The method of claim 19 , wherein said first ion implantation is performed by way of nitrogen implantation.
26 . The method of claim 25 , wherein said nitrogen implantation is performed utilizing the gas source of N 2 with a dosage of about 5×10 14 ˜5×10 16 ions/cm 2 under an implanting energy of about 10 KeV.
27 . The method of claim 25 , wherein said nitrogen implantation is performed utilizing the gas source of NH 3 with a dosage of about 5×10 14 ˜5×10 16 ions/cm 2 under an implanting energy of about 10 KeV.
28 . The method of claim 19 , wherein said first thermal oxidation is proceeded by way of dry oxidation at the temperature of about 1000° C.
29 . The method of claim 19 , wherein said first silicon dioxide layer is removed by way of dip wet etch with aqueous HF solution.
30 . The method of claim 19 , wherein said silicon nitride layer is removed by way of dip wet etch with aqueous H 3 PO 4 solution.Cited by (0)
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