US2002151090A1PendingUtilityA1

Integrated inductive circuits

Priority: May 30, 2000Filed: Apr 29, 2002Published: Oct 17, 2002
Est. expiryMay 30, 2020(expired)· nominal 20-yr term from priority
Inventors:Ting-Wah Wong
H10W 20/497H10W 10/031H10W 10/30H10D 84/0151H10D 84/859H10D 84/038H10D 84/00H10D 1/20
39
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Claims

Abstract

An RF circuit may be formed over a triple well that creates two reverse biased junctions. By adjusting the bias across the junctions, the capacitance across the junctions can be reduced, reducing the capacitive coupling from the RF circuits to the substrate, improving the self-resonance frequency of inductors and reducing the coupling of unwanted signals and noise from the underlying substrate to the active circuits and passive components such as the capacitors and inductors. As a result, radio frequency devices, such as radios, cellular telephones and transceivers such as Bluetooth transceivers, logic devices and Flash and SRAM memory devices may all be formed in the same integrated circuit die using CMOS fabrication processes.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . An integrated circuit comprising: 
 a substrate;    first and second triple wells formed in said substrate;    a spiral inductive element formed over said first triple well; and    a transistor formed in said substrate over said second triple well.    
     
     
         2 . The circuit of  claim 1  wherein said circuit is a complementary metal oxide semiconductor circuit.  
     
     
         3 . The circuit of  claim 1  wherein said first and second triple wells include an N-well with a P-well formed in said N-well and wherein said substrate is a P-type substrate.  
     
     
         4 . The circuit of  claim 3  wherein said N-well is a deep N-well.  
     
     
         5 . The circuit of  claim 4  wherein said inductive element is formed over said P-well.  
     
     
         6 . The circuit of  claim 1  including a memory formed in said substrate.  
     
     
         7 . The circuit of  claim 6  wherein said memory is flash memory.  
     
     
         8 . The circuit of  claim 1  wherein said circuit is a radio frequency device.  
     
     
         9 . The circuit of  claim 8  wherein said radio frequency device is a cellular telephone.  
     
     
         10 . The circuit of  claim 1  wherein said circuit is a wireless network transceiver.  
     
     
         11 . The circuit of  claim 10  wherein said circuit is a Bluetooth transceiver.  
     
     
         12 . The circuit of  claim 1  including logic circuits formed in said substrate.  
     
     
         13 . The circuit of  claim 12  including memory formed with logic circuits in said substrate.  
     
     
         14 . The circuit of  claim 1  wherein said N-well is biased to form two depletion capacitors.  
     
     
         15 . The circuit of  claim 1  wherein said first triple well forms two reverse biased diodes between the substrate and said inductive element.  
     
     
         16 . An integrated circuit comprising: 
 a substrate;    a triple well formed in said substrate; and    a transistor formed in said substrate over said triple well, said transistor being part of a radio frequency circuit.    
     
     
         17 . The circuit of  claim 16  wherein said transistor is the only component formed in said substrate over said second triple well.  
     
     
         18 . A method comprising: 
 forming a transistor in a substrate;    forming an inductive element over said substrate;    forming a first pair of reverse biased diodes between said inductive element and the substrate; and    forming a second pair of reverse biased diodes between said transistor and said substrate.    
     
     
         19 . The method of  claim 18  including forming said inductive element over a first triple well and said transistor over a second triple well.  
     
     
         20 . The method of  claim 19  including forming the first triple well of a deep N-well with a P-well formed inside said N-well and forming said inductive element over said P-well.  
     
     
         21 . The method of  claim 18  including forming logic elements in said substrate.  
     
     
         22 . The method of  claim 21  including forming a flash memory in said substrate.  
     
     
         23 . The method of  claim 18  including forming logic elements, radio frequency elements and flash memory in said substrate.  
     
     
         24 . The method of  claim 18  including forming a cellular telephone.  
     
     
         25 . The method of  claim 18  including forming a radio frequency transceiver.  
     
     
         26 . The method of  claim 18  including forming a Bluetooth transceiver.  
     
     
         27 . A method comprising: 
 forming a transistor in a substrate;    forming a pair of reverse biased diodes between said transistor and said substrate; and    connecting said transistor to a radio frequency circuit.    
     
     
         28 . The method of  claim 27  wherein forming a pair of reverse biased diodes between said transistor and said substrate includes forming only one transistor over a triple well in said substrate.

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