Microprocessor circuit for allowing input and output via a single pin

Abstract

A microprocessor circuit, and a method of monitoring and controlling an outside device using a single pin of a microprocessor, are disclosed. The microprocessor circuit includes a microprocessor having a pin, a first junction and a second junction that are both electrically coupled to the pin, and a capacitor by which the second junction is electrically coupled to the pin. The microprocessor circuit is capable of receiving at the first junction an input signal and providing a related signal to the pin in response to the input signal. The capacitor prevents signals below a certain frequency level from being communicated from the pin to the second junction. The microprocessor is capable of generating a control signal at the pin that includes at least one component that is above the certain frequency level, so that the generating of the control signal produces an output signal at the second junction.

What is claimed is:  
     
         1 . A microprocessor circuit comprising: 
 a microprocessor including a pin;    a first junction and a second junction that are both electrically coupled to the pin; and    a capacitor by which the second junction is electrically coupled to the pin,    wherein the microprocessor circuit is capable of receiving at the first junction an input signal and providing a related signal to the pin in response to the input signal,    wherein the capacitor prevents signals below a certain frequency level from being communicated from the pin to the second junction, and    wherein the microprocessor is capable of generating a control signal at the pin that includes at least one component that is above the certain frequency level, so that the generating of the control signal produces an output signal at the second junction.    
     
     
         2 . The microprocessor circuit of  claim 1 , wherein the microprocessor includes: 
 a limiting device capable of preventing a voltage at the pin from exceeding a maximum level and from falling below a minimum level; and    a switching device for allowing the microprocessor to control the voltage at the pin.    
     
     
         3 . The microprocessor circuit of  claim 2 , 
 wherein the limiting device includes a first diode coupled between the pin and a ground and a second diode coupled between the pin and a voltage supply,    wherein the first diode is coupled so that the first diode conducts current from the ground toward the pin when the voltage at the pin is tending to fall below the minimum level, and    wherein the second diode is coupled so that the second diode conducts current from the pin toward the voltage supply when the voltage at the pin is tending to exceed the maximum level.    
     
     
         4 . The microprocessor circuit of  claim 3 , 
 wherein the switching device includes a first internal transistor coupled between the pin and the ground and a second internal transistor coupled between the pin and the voltage supply,    wherein the microprocessor can switch on the second internal transistor while the first internal transistor is switched off and cause the voltage at the pin to become approximately equal to that of the voltage supply, and    wherein the microprocessor can switch on the first internal transistor while the second internal transistor is switched off and cause the voltage at the pin to become approximately equal to that of the ground.    
     
     
         5 . The microprocessor circuit of  claim 2 , wherein the input signal is a sinusoidal signal having a frequency below the certain frequency level.  
     
     
         6 . The microprocessor circuit of  claim 5 , 
 wherein the limiting device acts to prevent the voltage of the pin from exceeding the maximum level even though the input signal is tending to cause the voltage to exceed the maximum level, and acts to prevent the voltage of the pin from falling below the minimum level even though the input signal is tending to cause the voltage to fall below the minimum level.    
     
     
         7 . The microprocessor circuit of  claim 6 , wherein the microprocessor samples the voltage as an indication of the input signal at a first time when the voltage of the pin is limited at the maximum level.  
     
     
         8 . The microprocessor circuit of  claim 7 , wherein the switching device operates to cause the voltage of the pin to be switched from the maximum level to approximately the minimum level at a second time after the first time.  
     
     
         9 . The microprocessor circuit of  claim 8 , wherein the switching device operates to cause the voltage of the pin to be switched from approximately the minimum level to approximately the maximum level at a third time after the second time.  
     
     
         10 . The microprocessor circuit of  claim 9 , wherein the switching device operates to cause the voltage of the pin to be switched from approximately the maximum level to approximately the minimum level at a fourth time after the third time.  
     
     
         11 . The microprocessor circuit of  claim 9 , wherein the switching of the voltage of the pin generates the control signal and results in a negative voltage spike at the second junction at the second time and a positive voltage spike at the second junction at the third time, wherein the negative and positive voltage spikes are included within the output signal.  
     
     
         12 . The microprocessor circuit of  claim 1 , wherein the microprocessor circuit is configured to receive the input signal at the first junction from a thermostat, and is configured to provide the output signal at the second junction to an SCR-based relay driver.  
     
     
         13 . The microprocessor circuit of  claim 1 , further comprising a first resistor and a second resistor coupled in series between the pin and the first junction, and a third resistor and an additional capacitor coupled in parallel with one another between a ground and an intermediate node existing between the first and second resistors.  
     
     
         14 . The microprocessor circuit of  claim 1 , further comprising a first resistor and a second resistor, wherein the first capacitor is coupled between the pin and an intermediate node, wherein the first resistor is coupled between the intermediate node and the second junction, and wherein the second resistor is coupled between the second junction and a ground.  
     
     
         15 . The microprocessor circuit of  claim 1 , wherein the input signal is at least one of zero and a DC signal.  
     
     
         16 . A microprocessor circuit comprising: 
 a microprocessor including a pin;    an input junction electrically coupled to the pin so that, when an input signal is received at the input junction, a related signal is provided to the pin;    an output junction;    a buffering means coupled between the pin and the output junction for preventing a class of signals from being communicated from the pin to the output junction,    wherein the buffering means is configured so that the related signal provided to the pin in response to the input signal is within the class of signals that are prevented from being communicated to the output junction, and    wherein the buffering means is further configured so that a control signal generated by the microprocessor at the pin includes at least one component that is not within the class of signals that are prevented from being communicated to the output junction.    
     
     
         17 . The microprocessor circuit of  claim 16 , further comprising: 
 a limiting means within the microprocessor for preventing a voltage at the pin from exceeding a first level and from falling below a second level; and    a switching means within the microprocessor for allowing the microprocessor to control the voltage at the pin.    
     
     
         18 . A method of monitoring and controlling an outside device using a single pin of a microprocessor, the method comprising: 
 providing the microprocessor with the single pin, an input junction coupled to the single pin, and an output junction coupled to the single pin by way of a buffering device;    receiving at the input junction an input signal that originated from the outside device;    providing, based upon the input signal, a related signal to the single pin;    sampling the related signal at the single pin at a first time;    generating a control signal at the single pin at a second time; and    communicating at least one component of the control signal by way of the buffering device to produce an output signal capable of influencing an operation of the outside device.    
     
     
         19 . The method of  claim 18 , wherein the buffering device is a capacitor, and the input junction is coupled to the single pin by way of a high-resistance resistor, so that very little current is produced at the single pin in response to the input signal.  
     
     
         20 . The method of  claim 19 , wherein the generating of the control signal includes a switching of a voltage of the single pin to a low level at a third time and a switching of the voltage of the single pin to a high level at the second time, wherein the switching of the voltage at the third time allows the capacitor to discharge a charge buildup, and the switching of the voltage at the third and second times respectively results in the production of the output signal including at least a negative voltage spike at the third time and a positive voltage spike at the second time.