US2003030580A1PendingUtilityA1
Analog to digital converter utilizing resolution enhancement
Est. expiryMar 31, 2020(expired)· nominal 20-yr term from priority
Inventors:John R. Stice
H03M 1/129
30
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
An analog to digital converter for input signals having a low frequency component (such as DC) upon which is superimposed an AC component, the magnitude of the AC component being less than or equal to one-half the span of the analog to digital converter.
Claims
exact text as granted — not AI-modified1 . An analog to digital converter resolution enhancement method comprising the steps of:
connecting the input signal through a programmed gain preamplifier; utilizing the programmed gain preamplifier to match the full range of the analog to digital converter to the AC component of the input signal; and then, complementing the analog to digital converter range by an offset value thereby causing the programmed gain preamplifier to amplify the input signal at high gain while applying the offset value at low gain.
2 . An analog to digital converter having resolution enhancement comprising in combination:
an analog to digital converter having an input terminal and an output terminal; a programmed gain preamplifier having an input terminal for receiving an input signal and an output terminal coupled to the input terminal of said analog to digital converter; said programmed gain preamplifier matching the full range of said analog to digital converter to only the AC component portion of the input signal; said analog to digital converter having a range complemented by an offset value; and a summing junction for combining the output of said analog to digital converter with said offset value thereby causing said programmed gain preamplifier to amplify the input signal at high gain while applying the offset value at low gain.
3 . A method for calibrating the analog to digital converter having resolution enhancement of claim 2 including the steps of:
calibrating the analog to digital converter for each of a plurality of offset values; and,
wherein calibrating for each of a plurality of offset values includes generating a corresponding plurality of calibration waveforms.
4 . In combination:
a reduced span analog to digital converter; a programmed gain preamplifier coupled between an input terminal for receiving an input signal and said reduced span analog to digital converter; said programmed gain preamplifier matching the span of said analog to digital converter against only a portion of the system input; and, the entire input signal range provided by positioning the converter's span by means of an offset value.
5 . In combination:
a programmed gain preamplifier having an input terminal, an offset terminal, and an output terminal; a digital summing junction; said output terminal of said analog to digital converter coupled to said digital summing junction; an anti-alias filter having an input terminal and an output terminal; said output terminal of said anti-alias filter coupled to said input of said analog to digital converter; said input terminal of said anti-alias filter coupled to said output terminal of said programmed gain preamplifier; and, a digital to analog converter coupled between said digital summing junction and said offset terminal of said programmed gain preamplifier for providing an analog offset signal to said programmed gain preamplifier.
6 . The combination according to claim 5 wherein said programmed gain preamplifier provides a high differential gain for the input signal and a low single-ended gain for said analog offset signal.Join the waitlist — get patent alerts
Track US2003030580A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.