Semiconductor power converting apparatus

Abstract

To avoid that IGBTs are destroyed by receiving overvoltages while an overcurrent flows through series-connected IGBTs of a semiconductor power converting apparatus, a gate driver for controlling a gate voltage of the MOS control semiconductor owns a power supply line having a higher potential than such a gate potential when the MOS control semiconductor is brought into a steady ON state, and when a potential difference between the power supply line and an emitter of the MOS control semiconductor is constant, and also a collector voltage of the MOS control semiconductor exceeds a predetermined value under ON state of the MOS control semiconductor, the power source line of the gate driver supplies a current from the power source line to the gate of the MOS control semiconductor so as to increase the gate voltage of the MOS control semiconductor.

What is claimed is:  
     
         1 . A semiconductor power converting apparatus having an arrangement constructed by connecting MOS control semiconductors in a series connection manner, wherein: 
 a gate driver for controlling a gate voltage of said MOS control semiconductor owns a power supply line having a higher potential than such a gate potential when said MOS control semiconductor is brought into a steady ON state; and    when a potential difference between said power supply line and an emitter of said MOS control semiconductor is constant, and also a collector voltage of said MOS control semiconductor exceeds a predetermined value under ON state of said MOS control semiconductor, said power source line of the gate driver supplies a current from the power source line to the gate of said MOS control semiconductor so as to increase the gate voltage of said MOS control semiconductor.    
     
     
         2 . A semiconductor power converting apparatus having an arrangement constructed by connecting MOS control semiconductors in a series connection manner, the apparatus comprising: 
 a circuit for outputting a gate voltage command value for switching said MOS control semiconductor;    a circuit for outputting a gate voltage command value which becomes higher when a collector voltage of said MOS control semiconductor is increased; and    a circuit for comparing said two gate voltage command values with each other, and for controlling the gate voltage of said MOS control semiconductor to the higher gate voltage command value; wherein: 
 in the case that the collector voltage of said MOS control semiconductor is higher than a collector voltage under steady OFF state of said MOS control semiconductor, the gate voltage is increased higher than such a gate voltage of the MOS control semiconductor under steady ON state.  
   
     
     
         3 . A semiconductor power converting apparatus as claimed in  claim 2 , wherein: 
 said circuit for comparing said two gate voltage command values with each other and for controlling the gate voltage of the MOS control semiconductor to said higher gate voltage command value includes an arrangement in which both an npn transistor and a pnp transistor are connected in a complementary manner;    a collector of said pnp transistor is connected to an output of the circuit for outputting the gate voltage command value for switching said MOS control semiconductor; and    both a gate of said pnp transistor and a gate of said npn transistor are connected to an output of said circuit for outputting the gate voltage command value which becomes higher when the collector voltage of said MOS control semiconductor is increased.    
     
     
         4 . A semiconductor power converting apparatus as claimed in  claim 2 , wherein a diode is in an inverse-parallel connection with said pnp transistor.  
     
     
         5 . A semiconductor power converting apparatus having an arrangement constructed by connecting MOS control semiconductors in a series connection manner, the apparatus comprising: 
 means for outputting a gate voltage command value for switching said MOS control semiconductor;    means for outputting a gate voltage adding command value which becomes higher when a collector voltage of said MOS control semiconductor is increased; and    means for controlling a gate voltage of said MOS control semiconductor to such a voltage obtained by adding said gate voltage command value to said gate voltage adding command value.    
     
     
         6 . A gate driver for controlling gate voltages of MOS control semiconductors of a semiconductor power converter containing an arrangement in which said MOS control semiconductors are connected in a series connection manner, comprising: 
 a power supply line having a higher potential than such a gate potential when said MOS control semiconductor is brought into a steady ON state; and    means for supplying a current from the power source line to the gate of said MOS control semiconductor so as to increase the gate voltage of said MOS control semiconductor in such a case that when a potential difference between said power supply line and an emitter of said MOS control semiconductor is constant, and also a collector voltage of said MOS control semiconductor exceeds a predetermined value under ON state of said MOS control semiconductor.    
     
     
         7 . A gate driver for controlling a gate voltage of an MOS control semiconductor, comprising: 
 a circuit for outputting a gate voltage command value for switching said MOS control semiconductor;    a circuit for outputting a gate voltage command value which becomes higher when a collector voltage of said MOS control semiconductor is increased; and    a circuit for comparing said two gate voltage command values with each other, and for controlling the gate voltage of said MOS control semiconductor to the higher gate voltage command value; wherein: 
 in the case that the collector voltage of said MOS control semiconductor is higher than a collector voltage under steady OFF state of said MOS control semiconductor, the gate voltage is increased higher than such a gate voltage of the MOS control semiconductor under steady ON state.  
   
     
     
         8 . A gate driver as claimed in  claim 7 , wherein: 
 said circuit for comparing said two gate voltage command value with each other and for controlling the gate voltage of the MOS control semiconductor to said higher gate voltage command value includes an arrangement in which both an npn transistor and a pnp transistor are connected in a complementary manner;    a collector of said pnp transistor is connected to an output of the circuit for outputting the gate voltage command value for switching said MOS control semiconductor; and    both a gate of said pnp transistor and a gate of said npn transistor are connected to an output of said circuit for outputting the gate voltage command value which becomes higher when the collector voltage of said MOS control semiconductor is increased.    
     
     
         9 . A gate driver as claimed in  claim 8 , wherein a diode is in an inverse-parallel connection with said pnp transistor.  
     
     
         10 . A gate driver for controlling a gate voltage of an MOS control semiconductor, comprising: 
 means for outputting a gate voltage command value for switching said MOS control semiconductor;    means for outputting a gate voltage adding command value which becomes higher when a collector voltage of said MOS control semiconductor is increased; and    means for controlling a gate voltage of said MOS control semiconductor to such a voltage obtained by adding said gate voltage command value to said gate voltage adding command value.    
     
     
         11 . A semiconductor power converting apparatus comprising an MOS control semiconductor, wherein: 
 a gate driver for controlling a gate voltage of said MOS control semiconductor is comprised of: 
 a power supply line having a higher potential than such a gate potential when said MOS control semiconductor is brought into a steady ON state; and  
 means for supplying a current from the power source line to the gate of said MOS control semiconductor so as to increase the gate voltage of said MOS control semiconductor in such a case that when a potential difference between said power supply line and an emitter for said MOS control semiconductor is constant, and also a collector voltage of said MOS control semiconductor exceeds a predetermined value under ON state of said MOS control semiconductor.