Methods of fabrication of electronic interface structures

Abstract

One type of electronic interface structure includes a base; at least one elastomeric island supported by the base; and patterned metallization overlying the at least one elastomeric island and including at least one floating pad at least partially overlying the at least one elastomeric island. Another type of electronic interface structure includes a base; a first dielectric layer overlying the base and having at least one first dielectric layer opening therein; a second dielectric layer overlying the first dielectric layer; and patterned metallization overlying the second dielectric layer and including at least one floating pad at least partially overlying the at least one opening.

1 . An electronic interface structure comprising: 
 a base;    at least one elastomeric island supported by the base; and    patterned metallization overlying the at least one elastomeric island and including at least one floating pad at least partially overlying the at least one elastomeric island.    
     
     
         2 . The structure of  claim 1  wherein the base comprises a dielectric layer, a flexible interconnect layer, a printed circuit board, a circuit chip, a chip package, a multichip package, or a semiconductor wafer.  
     
     
         3 . The structure of  claim 1  wherein the base includes at least one electrical contact pad and further including a dielectric layer overlying the base and the at least one electrical contact pad and having at least one opening therein and at least one via therein with the at least one via extending to the at least one electrical contact pad, the at least one elastomeric island being situated in the at least one opening, and wherein the patterned metallization extends into the at least one via.  
     
     
         4 . The structure of  claim 3  wherein the at least one floating pad includes a central pad overlying the at least one elastomeric island, an outer ring overlying the dielectric layer, and at least one extension coupling the central pad and the outer ring.  
     
     
         5 . The structure of  claim 4  wherein the base comprises a flexible interconnect layer, a printed circuit board, a circuit chip, a chip package, a multichip package, or a semiconductor wafer.  
     
     
         6 . The structure of  claim 1  wherein the base includes at least one electrical contact pad; and further including a dielectric layer overlying the base and the at least one electrical contact pad and having at least one via therein with the at least one via extending to the at least one electrical contact pad, the at least one elastomeric island overlying the dielectric layer, and wherein the patterned metallization extends into the at least one via.  
     
     
         7 . The structure of  claim 6  wherein the at least one floating pad includes a central pad overlying the at least one elastomeric island, an outer ring overlying the dielectric layer, and at least one extension coupling the central pad and the outer ring.  
     
     
         8 . The structure of  claim 6  wherein the dielectric layer comprises a polymer layer, or passivation layer, or an interconnect layer.  
     
     
         9 . The structure of  claim 6  wherein the base comprises a circuit chip and the dielectric layer comprises a flexible interconnect layer.  
     
     
         10 . The structure of  claim 1  wherein the base has a through hole extending therethrough; the at least one elastomeric island overlies the base; and the patterned metallization overlies the at least one elastomeric island and both surfaces of the base and extends through the at least one through hole.  
     
     
         11 . The structure of  claim 10  wherein the at least one floating pad includes a central pad overlying the at least one elastomeric island, an outer ring overlying the dielectric layer, and at least one extension coupling the central pad and the outer ring.  
     
     
         12 . The structure of  claim 11  wherein the at least one elastomeric island comprises a plurality of elastomeric islands situated on both surfaces of the base.  
     
     
         13 . The structure of  claim 12  wherein a first elastomeric island is situated on an opposing side of the base and across from a second elastomeric island.  
     
     
         14 . An electronic interface structure comprising: 
 a base;    a first dielectric layer overlying the base and having at least one first dielectric layer opening therein;    a second dielectric layer overlying the first dielectric layer and the at least one first dielectric layer opening; and    patterned metallization overlying the second dielectric layer and including at least one floating pad at least partially overlying the at least one opening.    
     
     
         15 . The structure of  claim 14  wherein the floating pad includes central pad overlying the at least one opening, an outer ring overlying the first and second dielectric layers, and at least one extension coupling the central pad and the outer ring.  
     
     
         16 . The structure of  claim 15  wherein: 
 the base includes at least one electrical contact pad;  
 the first and second dielectric layers have at least one via extending therethrough to the at least one electrical contact pad;  
 the patterned metallization extends into the at least one via.  
 
     
     
         17 . The structure of  claim 16  further including a solder mask overlying the second dielectric layer and the patterned metallization and having a solder mask opening over at least a portion of the central pad.  
     
     
         18 . The structure of  claim 17  wherein the base comprises a wafer and the at least one first dielectric layer opening comprises at least two dielectric openings with at least one of the at least two dielectric openings being situated over a wafer scribe lane.  
     
     
         19 . The structure of  claim 14  wherein: 
 the base includes at least one electrical contact pad;  
 the first and second dielectric layers have at least one via extending therethrough to the at least one electrical contact pad;  
 the patterned metallization extends into the at least one via.  
 
     
     
         20 . The structure of  claim 14  further including elastomeric material situated in the at least one opening.  
     
     
         21 . The structure of  claim 14  wherein the base comprises a wafer and the at least one first dielectric layer opening comprises at least two dielectric openings with at least one of the at least two dielectric openings being situated over a wafer scribe lane.  
     
     
         22 . A method for fabricating an electronic interface structure comprising applying patterned metallization over at least one elastomeric island supported by a base including at least one floating pad at least partially overlying the elastomeric island.  
     
     
         23 . The method of  claim 22  wherein the base includes at least one electrical contact pad and further including, prior to applying the patterned metallization, 
 applying a dielectric layer over the base and the at least one electrical contact pad;  
 providing at least one opening in the dielectric layer;  
 forming the elastomeric island in the at least one opening;  
 providing at least one via in the dielectric layer extending to the at least one electrical contact pad, and  
 wherein patterning the metallization includes patterning metallization extending into the at least one via.  
 
     
     
         24 . The method of  claim 23  wherein providing the at least one via occurs subsequent to forming the elastomeric island.  
     
     
         25 . The method of  claim 24  wherein forming the elastomeric island comprises coating the dielectric layer with a polymer and photo-curing the polymer in the at least one opening of the dielectric layer.  
     
     
         26 . The method of  claim 24  wherein forming the elastomeric island comprises dispensing a polymer into the at least one opening of the dielectric layer and thermally curing the polymer.  
     
     
         27 . The method of  claim 23  wherein applying the patterned metallization includes patterning the at least one floating pad to include a central pad overlying the at least one elastomeric island, an outer ring overlying the dielectric layer, and at least one extension coupling the central pad and the outer ring.  
     
     
         28 . The method of  claim 22  wherein the base includes at least one electrical contact pad and further including, prior to applying the patterned metallization: 
 applying a dielectric layer overlying the base and the at least one electrical contact pad;  
 providing at least one via in the dielectric layer with the at least one via extending to the at least one electrical contact pad;  
 applying the at least one elastomeric island over the dielectric layer, and  
 wherein applying the patterned metallization includes applying patterned metallization into the at least one via.  
 
     
     
         29 . The method of  claim 28  wherein applying the patterned metallization includes patterning the at least one floating pad to include a central pad overlying the at least one elastomeric island, an outer ring overlying the dielectric layer, and at least one extension coupling the central pad and the outer ring.  
     
     
         30 . The method of  claim 22  further including, prior to applying the patterned metallization, 
 applying the at least one elastomeric island on a surface of the base, and providing a through hole extending through the base,  
 wherein applying the patterned metallization includes patterning metallization extending through the at least one through hole and on both surfaces of the base.  
 
     
     
         31 . The method of  claim 30  wherein applying the patterned metallization includes patterning the at least one floating pad to include a central pad overlying the at least one elastomeric island, an outer ring overlying the dielectric layer, and at least one extension coupling the central pad and the outer ring.  
     
     
         32 . The method of  claim 31  wherein applying the at least one elastomeric island on a surface of the base, comprises applying a plurality of elastomeric islands on both surfaces of the base.  
     
     
         33 . The method of  claim 32  wherein a first elastomeric island is applied on an opposing side of the base and across from a second elastomeric island.  
     
     
         34 . A method for fabricating an electronic interface structure comprising: 
 providing a second dielectric layer overlying a first dielectric layer overlying a base, with the first dielectric layer having at least one first dielectric layer opening therein; and    applying patterned metallization over the second dielectric layer including at least one floating pad at least partially overlying the at least one first dielectric layer opening.    
     
     
         35 . The method of  claim 34  wherein applying the patterned metallization includes patterning the floating pad to include a central pad overlying the at least one opening, an outer ring overlying the first and second dielectric layers, and at least one extension coupling the central pad and the outer ring.  
     
     
         36 . The method of  claim 35  wherein the base includes at least one electrical contact pad, and further including providing at least one via extending through the first and second dielectric layers to the at least one electrical contact pad, wherein patterned the metallization includes patterning metallization extending into the at least one via.  
     
     
         37 . The method of  claim 36  further including situating an elastomeric material in the opening of the first dielectric layer prior to applying the second dielectric layer.  
     
     
         38 . The method of  claim 36  further including applying a solder mask over the second dielectric layer and the patterned metallization and providing a solder mask opening over at least a portion of the central pad.  
     
     
         39 . The method of  claim 34  wherein providing includes forming at least two first dielectric layer openings in the first dielectric layer with at least one first of the at least two dielectric layer openings comprising an opening over which the metallization will be patterned and at least one second of the at least two dielectric layer openings situated over a wafer scribe lane of the base.  
     
     
         40 . The method of  claim 39  further including removing portions of the second dielectric layer overlying the at least one second of the at least two dielectric layer openings.