Packet communication device, packet communication system, packet communication module, data processor, and data transfer system
Abstract
A transmit packet generated by a CPU 1 is held in a buffer 100 a ( 100 b ). From among packets received from Ethernet 820 a ( 820 b ), a packet, a destination of which is a communication device 800 , is held in the buffer 100 a ( 100 b ). A packet which should be transmitted is transmitted from a transfer judging circuit 200 to Ethernet 820 a or 820 b through a MAC unit 300 a or 300 b . If a transfer judging circuit 200 judges a packet from the Ethernet 820 a to be a packet, a destination of which is another communication device, with reference to a destination MAC address, this packet is transferred to the Ethernet 820 b through MAC 300 b . If a usage rate of a transferring FIFO buffer 130 a ( 130 b ) exceeds a threshold value in the process of transmitting a packet held in a transmitting FIFO buffer 120 a ( 130 b ) on a priority basis, the priority order of a transfer packet is made higher than that of a transmit packet so that the transfer packet is transferred to the Ethernet 820 a or 820 b in preference to the transmit packet. This prevents a transfer buffer means from overflowing.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A packet communication device comprising:
a plurality of communication means for transmitting and receiving a packet to and from a plurality of communication targets; packet generation processing means for generating a packet to be transmitted by the plurality of communication means, and processing a packet received by the plurality of communication means; transfer buffer means for holding a transfer packet which is used to give and receive information mutually between the plurality of communication targets; and transfer control means for, if it is judged that the packet received by the plurality of communication means is the transfer packet, outputting the received packet to the transfer buffer means, and outputting either a packet generated by the packet generation processing means or a transfer packet held in the transfer buffer means on a priority basis to a specified communication means corresponding to a communication target to which the packet is transmitted or transferred; wherein, if a usage rate of the transfer buffer means exceeds a threshold value, said transfer control means makes the priority order of the transfer packet higher than that of the generated packet, and thereby outputs the transfer packet to the specified communication means in preference to the generated packet.
2 . A packet communication device comprising
a plurality of communication means for transmitting and receiving a packet to and from a plurality of communication targets; packet generation processing means for generating a packet to be transmitted by the plurality of communication means, and processing a packet received by the plurality of communication means; transfer buffer means for holding a transfer packet which is used to give and receive information mutually between the plurality of communication targets; and transfer control means by which the packet received by the plurality of communication means is judged to be a packet which should be processed by the packet generation processing means or to be the transfer packet, and according to the result of the judgment, the received packet is output to the packet generation processing means or the transfer packet means, and either the packet generated by the packet generation processing means or the transfer packet held in the transfer buffer means is output, on a priority basis, to a specified communication means corresponding to a communication target to which the packet is transmitted or transferred: wherein if a usage rate of the transfer buffer means exceeds a threshold value for changing the priority order, said transfer control means makes the priority order of the transfer packet higher than that of the generated packet, and thereby outputs the transfer packet to the specified communication means in preference to the generated packet.
3 . A packet communication device according to claim 1 , wherein said transfer control means comprises a priority-order register which can be set by the packet generation processing means, and the priority-order register is loaded with a threshold value for changing the priority order, said threshold value being related to a usage rate of the transfer buffer means.
4 . A packet communication device according to claim 2 , wherein said transfer control means comprises a priority-order register which can be set by the packet generation processing means, and the priority-order register is loaded with a threshold value for changing the priority order, said threshold value being related to a usage rate of the transfer buffer means.
5 . A packet communication device according to claim 1 , wherein, if the usage rate of the transfer buffer means exceeds the threshold value for flow control, said transfer control means outputs a flow-control packet to a specified communication means corresponding to a communication target from which transfer is made.
6 . A packet communication device according to claim 1 , further comprising receiving buffer means for temporarily holding a packet received by the plurality of communication means, wherein, if the usage rate of the receive buffer means exceeds a threshold value for flow control, said transfer control means outputs a flow-control packet to a specified communication means corresponding to a communication target from which transmission is made.
7 . A packet communication device according to claim 5 , wherein said transfer control means comprises a flow-control register which can be set by the packet generation processing means, and said flow-control register is loaded with a threshold value for flow control, said threshold value being related to a usage rate of the transfer butter means or a usage rate of the receive buffer means.
8 . A packet communication device comprising:
a plurality of communication means for transmitting and receiving a packet, which includes an IP address and a port as its additional address, to and from a plurality of communication targets; priority-order judging means for, according to a combination of the IP address and the port, judging the priority order relating to the extent to which the packet requires real-time processing; a plurality of transmit buffer means for holding a transmit packet in association with the priority order relating to the extent to which real-time processing is required; and prioritized-packet selecting means for selecting a packet having the highest priority order from among transmit packets held in the plurality of transmit buffer means according to the result of judgment by the priority-order judging means, and outputting the selected packet, on a priority basis, to a specified communication means corresponding to a communication target to which the packet is transmitted or transferred.
9 . A packet communication device according to claim 8 , further comprising:
packet generation processing means for generating a packet to be transmitted by the plurality of communication means, and processing a packet received by the plurality of communication means; transfer buffer means for holding a transfer packet which is used to give and receive information mutually between the plurality of communication targets; and transfer control means by which the packet received by the plurality of communication means is Judged to be a packet which should be processed by the packet generation processing means, or to be the transfer packet, and according to the result of the judgment, the received packet is output to the packet generation processing means or the transfer packet means, and the packet generated by the packet generation processing means is output to the transmit buffer means; wherein said prioritized-packet selecting means outputs the transfer packet held in the transfer buffer means to a specified transmit buffer means according to the priority order.
10 . A packet communication device according to claim 8 , wherein, if a usage rate of one of the plurality of transmit buffer means exceeds a threshold value, the prioritized-packet selecting means outputs a packet held in said one of the plurality of transmit buffer means, in which the threshold value is exceeded, to the specified communication means in preference to other packets
11 . A packet communication device according to claim 10 , wherein said prioritized-packet selecting means comprises a register which can be set by the packet generation processing means, and said register is loaded with a threshold value relating to a usage rate of the transfer buffer means.
12 . A packet communication system comprising:
a plurality of packet communication devices for transmitting and receiving a packet which includes an IP address and a port as its additional address; and a priority-order control unit that determines, according to a combination of the IP address and the port, the priority order relating to the extent to which real-time processing is required by a packet transmitted and received between the plurality of packet communication devices; wherein the plurality of packet communication devices are connected to one another in series.
13 . A packet communication system according to claim 12 , wherein said plurality of packet communication devices are configured as packet communication devices according to any one of claims 7 , 8 , 9 , and 10 .
14 . A packet communication module comprising;
a plurality of communication means for transmitting and receiving a packet to and from a plurality of communication targets; transfer buffer means for holding a transfer packet which is used to give and receive information mutually between the plurality of communication targets; and transfer control means by which if it is judged that a packet received by the plurality of communication means is the transfer packet, the received packet is output to the transfer buffer means, and either a transmit packet or a transfer packet held in the transfer buffer means is output, on a priority basis, to a specified communication means corresponding to a communication target to which the packet is transmitted or transferred; wherein, if a usage rate of the transfer buffer means exceeds a threshold value, said transfer control means makes the priority order of the transfer packet higher than that of the transmit packet, and thereby outputs the transfer packet to the specified communication means in preference to the transmit packet.
15 . A packet communication module according to claim 14 , wherein said transfer control means comprises a priority-order register which can be set by the packet generation processing means, and the priority-order register is loaded with a threshold value for changing the priority order, said threshold value being related to a usage rate of the transfer buffer means.
16 . A data processor comprising:
a CPU; and an external interface circuit connected to an internal bus which can be connected to the CPU, wherein said external interface circuit including:
a plurality of network controllers;
transmitting and receiving FIFO buffers, one of which is connected to the corresponding one of the plurality of network controllers, temporarily store transmit data and reception data; and
transferring FIFO buffers that interconnect the network controllers, and that temporarily store transfer data which is transferred between the network controllers; and
wherein in response to an address included in information received from outside, the network controller can control the received information so that the received information is distributed to the transmitting and receiving FIFO buffer or the transferring FIFO buffer.
17 . A data processor according to claim 16 , wherein, in said transferring FIFO buffers, the storage capacity of a buffer area used in a direction from one network controller to the other network controller, and the storage capacity of another buffer area used in the reverse direction, are variable.
18 . A data processor according to claim 17 , wherein said network controller can control the storage capacity of both buffer areas of the transferring FIFO buffer so that they are variable according to buffer size information.
19 . A data processor according to claim 18 , wherein said buffer size information is specified in the network controller by program control of the CPU.
20 . A data processor according to claim 18 , wherein the specified buffer size of a buffer connected to a network a transfer rate of which is higher is made larger.
21 . A data processor according to claim 18 , wherein with reference to a FIFO buffer size specified in the buffer size information, as a result of comparison between the storage capacity of a buffer area used in a direction from one network controller to the other network controller and the storage capacity of another buffer area used in the reverse direction, if the storage capacity of an unoccupied part in one of the buffer areas is decreasing, said network controller performs FIFO control by adding an unoccupied area of the other buffer area to said buffer area where the storage capacity is unoccupied part is decreasing so that dynamic variable control of the storage capacity becomes possible.
22 . A data transfer system comprising:
a plurality of data communication channels; transmitting and receiving FIFO buffers, one of which is connected to the corresponding one of the plurality of data communication channels, temporarily store transmit data and reception packet; and transferring FIFO buffers that interconnect the data communication channels, and that temporarily store transfer data, which is transferred between the data communication channels, in buffer areas; wherein it is possible to control the storage capacity of the buffer areas in such a manner that the storage capacity of a buffer area used in a direction from a data communication channel (where a data communication rate of communication to and from an external device connected to this data communication channel is high) to a data communication channel (where a data communication rate of communication to and from an external device connected to this data communication channel is low) is made larger than the storage capacity of another buffer area used in the reverse direction.
23 . A data transfer system according to claim 22 , wherein said data communication channel can control the storage capacity of both buffer areas of the transferring FIFO buffer so that they are variable according to buffer size information.
24 . A data transfer system according to claim 23 , wherein said buffer size information is specified in the data communication channel by program control of the CPU.
25 . A data transfer system according to claim 23 , wherein, with reference to a FIFO buffer size specified in the buffer size information, as a result of comparison between the storage capacity of a buffer area used in a direction from one data communication channel to the other communication channel and the storage capacity of another buffer area used in the reverse direction, if the storage capacity of an unoccupied part in one of the buffer areas is decreasing, the data communication channel performs FIFO control by adding an unoccupied area of the other buffer area to said buffer area where the storage capacity of the unoccupied part is decreasing so that dynamic variable control of the storage capacity becomes possible.Join the waitlist — get patent alerts
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