US2003122987A1PendingUtilityA1

Array substrate for a liquid crystal display device having multi-layered metal line and fabricating method thereof

39
Priority: Dec 28, 2001Filed: Dec 24, 2002Published: Jul 3, 2003
Est. expiryDec 28, 2021(expired)· nominal 20-yr term from priority
Inventors:Myung-Joon KimHu-Kag LeeBeung-Hwa Jeong
G02F 1/1368
39
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Claims

Abstract

An array substrate for a liquid crystal display device includes: a substrate; a gate electrode and a gate line on the substrate; a gate insulating layer on the gate electrode and the gate line; an active layer on the gate insulating layer; an ohmic contact layer on the active layer; source and drain electrodes and a data line on the ohmic contact layer, the source and drain electrodes and the data line having a multiple metal layer; a passivation layer on the source and drain electrodes and the data line; and a pixel electrode on the passivation layer.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . An array substrate for a liquid crystal display device, comprising: 
 a substrate;    a gate electrode and a gate line on the substrate;    a gate insulating layer on the gate electrode and the gate line;    an active layer on the gate insulating layer;    an ohmic contact layer on the active layer;    source and drain electrodes and a data line on the ohmic contact layer, the source and drain electrodes and the data line having a multiple metal layer;    a passivation layer on the source and drain electrodes and the data line; and    a pixel electrode on the passivation layer.    
     
     
         2 . The substrate according to  claim 1 , wherein the multiple metal layer comprises first, second and third metal layers.  
     
     
         3 . The substrate according to  claim 2 , wherein the first metal layer has a thickness within a range of about 100 Å to about 1000 Å.  
     
     
         4 . The substrate according to  claim 3 , wherein the first metal layer includes one of titanium (Ti), chromium (Cr), tantalum (Ta), molybdenum (Mo), molybdenum tungsten (MoW), and an alloy thereof.  
     
     
         5 . The substrate according to  claim 4 , wherein the second metal layer includes one of aluminum (Al) and aluminum (Al) alloy.  
     
     
         6 . The substrate according to  claim 5 , wherein the third metal layer includes molybdenum (Mo).  
     
     
         7 . An array substrate for a liquid crystal display device, comprising: 
 a substrate;    a gate electrode and a gate line on the substrate;    a gate insulating layer on the gate electrode and the gate line;    an active layer on the gate insulating layer;    an ohmic contact layer on the active layer;    source and drain electrodes and a data line on the ohmic contact layer, the source and drain electrodes and the data line having a multiple metal layer;    a passivation layer on the source and drain electrodes and the data line; and    a pixel electrode on the passivation layer, 
 wherein an oxide film is formed between first and second metal layers of the multiple metal layer.  
   
     
     
         8 . The substrate according to  claim 7 , wherein the oxide film is a metal oxide film.  
     
     
         9 . The substrate according to  claim 8 , wherein the metal oxide film has a thickness less than about 50 Å.  
     
     
         10 . A fabricating method of an array substrate for a liquid crystal display device, comprising: 
 forming a gate electrode and a gate line on a substrate;    forming a gate insulating layer on the gate electrode and the gate line;    forming an active layer on the gate insulating layer;    forming an ohmic contact layer on the active layer;    depositing a first metal layer of a multiple metal layer on the ohmic contact layer;    plasma-treating the first metal layer;    sequentially depositing the other metal layers of the multiple metal layer on the first layer;    patterning the multiple metal layer to form source and drain electrodes and a data line;    forming a passivation layer on the source and drain electrodes and the data line; and    forming a pixel electrode on the passivation layer.    
     
     
         11 . The method according to  claim 10 , wherein the plasma-treating the first metal layer is performed using an oxygen (O 2 ) plasma.  
     
     
         12 . The method according to  claim 11 , wherein the plasma-treating the first metal layer is performed using one of direct current (DC) plasma, radio frequency (RF) plasma and a combination of DC plasma and RF plasma.  
     
     
         13 . The method according to  claim 10 , wherein the multiple metal layer comprises first, second and third metal layers.  
     
     
         14 . The method according to  claim 13 , wherein the first metal layer includes one of titanium (Ti), chromium (Cr), tantalum (Ta), molybdenum (Mo), molybdenum tungsten (MoW), and an alloy thereof.  
     
     
         15 . The method according to  claim 14 , wherein the second metal layer includes one of aluminum (Al) and aluminum (Al) alloy.  
     
     
         16 . The method according to  claim 15 , wherein the third metal layer includes molybdenum (Mo).  
     
     
         17 . The method according to  claim 10 , wherein the first metal layer has a thickness within a range of about 100 Å to about 1000 Å.  
     
     
         18 . An array substrate for a liquid crystal display device, comprising: 
 a substrate;    a gate electrode and a gate line on the substrate;    a gate insulating layer on the gate electrode and the gate line;    an active layer on the gate insulating layer;    an ohmic contact layer on the active layer;    source and drain electrodes and a data line on the ohmic contact layer, the source and drain electrodes and the data line including a first metal layer of chromium (Cr) and a second metal layer of aluminum (Al), the data line crossing the gate line;    a passivation layer on the source and drain electrodes and the data line; and    a pixel electrode on the passivation layer.    
     
     
         19 . The substrate according to  claim 18 , further comprising a gate pad connected to the gate line.  
     
     
         20 . The substrate according to  claim 18 , further comprising a data pad connected to the data line.  
     
     
         21 . The substrate according to  claim 18 , further comprising a source-drain metal layer on the gate insulating layer over a portion of the gate line.  
     
     
         22 . The substrate according to  claim 21 , wherein the source-drain metal layer is connected to the pixel electrode through a capacitor contact hole through the passivation layer.  
     
     
         23 . The substrate according to  claim 18 , wherein the source and drain electrodes and the data line further includes a third metal layer of molybdenum (Mo) on the second metal layer.  
     
     
         24 . A fabricating method of an array substrate for a liquid crystal display device, comprising: 
 forming a gate electrode and a gate line on a substrate;    forming a gate insulating layer on the gate electrode;    forming an active layer on the gate insulating layer;    forming an ohmic contact layer on the active layer;    sequentially depositing a first metal layer of chromium (Cr), a second metal layer of aluminum (Al) and a third metal layer of molybdenum (Mo) on the ohmic contact layer;    patterning the first, second and third metal layers to form source and drain electrodes and a data line crossing the gate line;    forming a passivation layer on the source and drain electrodes and the data line; and    forming a pixel electrode on the passivation layer.    
     
     
         25 . The method according to  claim 24 , wherein patterning the first, second and third metal layers comprises: 
 etching an entire surface of the third metal layer;    forming a photoresist (PR) pattern on the second metal layer; and    sequentially etching the second and first metal layers using the PR pattern as an etching mask.    
     
     
         26 . The method according to  claim 25 , wherein etching an entire surface of the third metal layer is performed by using a first solution including hydrogen peroxide (H 2 O 2 ).  
     
     
         27 . The method according to  claim 26 , wherein etching the second metal layer is performed by using a second solution of mixed acid solution.  
     
     
         28 . The method according to  claim 27 , wherein etching the first metal layer is performed by using a third solution including  
       Ce(NH 4 ) 2 (NO 3 )+HNO 3 (CAN).  
     
     
         29 . The method according to  claim 24 , wherein the first metal layer has a thickness within a range of about 30 Å to about 1000 Å, the second metal layer has a thickness within a range of about 1000 Å to about 3000 Å, and the third metal layer has a thickness within a range of about 30 Å to about 1000 Å.

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