Apparatus and processes for the mass production of photovoltaic modules

Abstract

An apparatus and processes for large scale inline manufacturing of CdTe photovoltaic modules in which all steps, including rapid substrate heating, deposition of CdS, deposition of CdTe, CdCl 2 treatment, and ohmic contact formation, are performed within a single vacuum boundary at modest vacuum pressures. A p+ ohmic contact region is formed by subliming a metal salt onto the CdTe layer. A back electrode is formed by way of a low cost spray process, and module scribing is performed by means of abrasive blasting or mechanical brushing through a mask. The vacuum process apparatus facilitates selective heating of substrates and films, exposure of substrates and films to vapor with minimal vapor leakage, deposition of thin films onto a substrate, and stripping thin films from a substrate. A substrate transport apparatus permits the movement of substrates into and out of vacuum during the thin film deposition processes, while preventing the collection of coatings on the substrate transport apparatus itself.

We claim:  
     
         1 . A method for fabricating semiconductor layers of a photovoltaic cell, all of the steps of which are carried out in a single vacuum chamber at a constant vacuum level, the method comprising the steps of: 
 providing, in the vacuum chamber, a substrate upon which the photovoltaic cell is to be fabricated;    heating the substrate to a desired temperature in the vacuum chamber;    depositing one or more layers of n-type IIB/VIB semiconductor material onto a surface of the substrate in the vacuum chamber;    depositing one or more layers of p-type IIB/VIB semiconductor material onto the one or more layers of n-type IIB/VIB semiconductor material in the vacuum chamber;    treating the one or more layers of n-type IIB/VIB and p-type IIB/VIB semiconductor material with a halogen containing substance in the vacuum chamber; and    forming an ohmic contact on the treated one or more layers of p-type IIB/VIB semiconductor material in the vacuum chamber by depositing a metal compound onto the treated one or more layers of p-type IIB/VIB semiconductor material and then annealing the treated one or more layers of p-type IIB/VIB semiconductor material.    
     
     
         2 . A method as in  claim 1 , wherein the n-type semiconductor material comprises cadmium sulfide.  
     
     
         3 . A method as in  claim 1 , wherein the p-type semiconductor material comprises cadmium telluride.  
     
     
         4 . A method as in  claim 1 , wherein the halogen containing substance comprises cadmium chloride.  
     
     
         5 . A method as in  claim 1 , further comprising the step of depositing in the vacuum chamber a layer of a transparent conductive oxide onto the substrate prior to the step of depositing the one or more layers of n-type IIB/VIB semiconductor onto the substrate.  
     
     
         6 . A method as in  claim 1 , further comprising the step of depositing an antireflective layer on an opposite surface of the substrate in the vacuum chamber.  
     
     
         7 . A method as in  claim 1 , further comprising the step of treating the one or more layers of n-type IIB/VIB semiconductor material with the halogen containing substance prior to depositing the one or more layers of p-type IIB/VIB semiconductor material.  
     
     
         8 . A method as in  claim 7 , wherein the halogen containing substance comprises cadmium chloride.  
     
     
         9 . A method as in  claim 7 , wherein the step of treating the one or more layers of n-type IIB/VIB semiconductor material with the halogen containing substance comprises: 
 exposing the one, or more layers of n-type IIB/VIB semiconductor material to the vapor of the halogen containing substance for a predetermined time at a specific temperature; and    annealing the one or more layers of n-type IIB/VIB semiconductor material previously exposed to the vapor of the halogen containing substance.    
     
     
         10 . A method as in  claim 9 , wherein: 
 the temperature at which the one or more layers of n-type IIB/VIB semiconductor material is exposed to the vapor of the halogen containing substance is suitable for depositing a film of the halogen containing substance onto the one or more layers of n-type IIB/VIB semiconductor material; and    the step of annealing the one or more layers of n-type IIB/VIB semiconductor material is performed at a temperature suitable for treating the one or more layers of n-type IIB/VIB semiconductor material and removing the previously deposited film of the halogen containing substance.    
     
     
         11 . A method as in  claim 1 , wherein the step of treating the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material with a halogen containing substance comprises: 
 exposing the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material to the vapor of the halogen containing substance for a predetermined time at a specific temperature; and    annealing the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material that have been exposed to the vapor of the halogen containing substance.    
     
     
         12 . A method as in  claim 11 , wherein: 
 the temperature at which the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material are exposed to the vapor of the halogen containing substance is suitable for depositing a film of the halogen containing substance onto the one or more layers of p-type IIB/VIB semiconductor material; and    the step of annealing the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material is performed at a temperature suitable for treating the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material and removing the previously deposited film of the halogen containing substance.    
     
     
         13 . A method as in  claim 1 , wherein the metal compound is a metal salt selected from the group comprising the salts of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         14 . A method as in  claim 1 , wherein the metal compound is an organometallic compound selected from the group comprising the organometallic compounds of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         15 . A method for forming an ohmic contact on one or more layers of p-type IIB/VIB semiconductor material, the method comprising the steps of: 
 depositing a metal compound onto the one or more layers of p-type IIB/VIB semiconductor material in the vacuum chamber; and    annealing the one or more layers of p-type IIB/VIB semiconductor material in the vacuum chamber.    
     
     
         16 . A method as in  claim 15 , wherein the step of annealing the one or more layers of p-type IIB/VIB semiconductor material in the vacuum chamber comprises heating said one or more layers of p-type IIB/VIB semiconductor material in a suitable gas.  
     
     
         17 . A method as in  claim 15 , wherein the one or more layers of p-type IIB/VIB semiconductor material comprises cadmium telluride.  
     
     
         18 . A method as in  claim 15 , wherein the metal compound is a metal salt selected from the group comprising the salts of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         19 . A method as in  claim 15 , wherein the metal compound is an organometallic compound selected from the group comprising the organometallic compounds of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         20 . A method for forming a conductive electrode on a desired surface of a semiconductor device, the method comprising the steps of: 
 spraying a conductive graphite coating onto the desired surface; and    spraying a conductive metal coating onto the conductive graphite coating.    
     
     
         21 . A method as in  claim 20 , wherein the conductive metal coating comprises nickel.  
     
     
         22 . A method for forming a conductive electrode on a desired surface of a semiconductor device, the method comprising the steps of: 
 spraying a conductive metal coating onto the desired surface; and    drying the sprayed conductive metal coating.    
     
     
         23 . A method for scribing one or more selected layers of a photovoltaic device, the method comprising the steps of: 
 positioning a contact mask over the one or more selected layers, the contact mask having openings defining areas of the one or more layers to be removed; and    impacting the one or more selected layers through the openings in the contact mask to remove the defined areas of one or more selected layers.    
     
     
         24 . A method as in  claim 23 , wherein the step of impacting the one or more selected layers through the openings in the contact mask comprises abrasive blasting with a selected medium.  
     
     
         25 . A method as in  claim 23 , wherein the step of impacting the one or more selected layers through the openings in the contact mask comprises applying a rotating abrasive device to the one or more selected layers through the openings in the contact mask.  
     
     
         26 . Apparatus for transporting substrates within a vacuum chamber, the apparatus comprising: 
 a pair of spaced apart parallel metal belts positioned within the vacuum chamber;    a translator for bidirectionally moving the pair of metal belts in concert; and    a plurality of aligned, periodically-spaced tabs positioned on an outer surface of each of the metal belts for retaining a plurality of the substrates in fixed positions spanning the metal belts.    
     
     
         27 . Apparatus for transporting substrates within a vacuum chamber as in  claim 26 , wherein the vacuum chamber includes front and rear openings through which the pair of metal belts and the substrates pass, extending outside said front and rear openings, the apparatus further comprising: 
 a clearance distance between each of the substrates and the front and rear openings so as to permit motion of the substrates while at the same time restricting air leaks, to thereby maintain a desired level of vacuum in the chamber.    
     
     
         28 . Apparatus for transporting and processing a plurality of substrates by exposing them to heating, film deposition or vapor treatment within a vacuum chamber, the apparatus comprising: 
 a plurality of heated pockets positioned in proximity to and in correspondence with each of the plurality of substrates such that a clearance distance between a surface of each of the substrates and the corresponding one of the heated pockets is minimized so as to permit motion of the substrates while restricting vapor leaks from the heated pockets; and    a transporter for moving the substrates from one heated pocket to the next.    
     
     
         29 . Apparatus as in  claim 28 , wherein the transporter comprises: 
 a pair of spaced apart parallel metal belts positioned within the vacuum chamber;    a translator for bidirectionally moving the pair of metal belts in concert;    a plurality of aligned, periodically-spaced tabs positioned on an outer surface of each of the metal belts for retaining a plurality of the substrates in fixed positions spanning the metal belts; and    a controller, coupled to said translator for indexing the belts incrementally to move each of the substrates from one heated pocket to another.    
     
     
         30 . Apparatus as in  claim 28 , wherein a selected one or more of the heated pockets includes a high voltage pin coupled to a source of D.C. voltage for creating a plasma within the selected one or more of the heated pockets.  
     
     
         31 . A method for fabricating semiconductor layers of a photovoltaic cell, all of the steps of which are carried out in a single vacuum chamber at a constant vacuum level the method comprising the steps of: 
 providing, in the vacuum chamber, a substrate having one or more layers of an n-type transparent conductive oxide upon which the photovoltaic cell is to be fabricated;    heating the substrate to a desired temperature in the vacuum chamber;    depositing one or more layers of p-type IIB/VIB semiconductor material onto a surface of the substrate in the vacuum chamber;    treating the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semiconductor material with a halogen containing substance in the vacuum chamber; and    forming an ohmic contact on the treated one or more layers of p-type IIB/VIB semiconductor material in the vacuum chamber.    
     
     
         32 . A method as in  claim 31 , wherein the p-type IIB/VIB seimiconductor material comprises cadmium telluride.  
     
     
         33 . A method as in  claim 31 , wherein the halogen containing substance comprises cadmium chloride.  
     
     
         34 . A method as in  claim 31 , wherein the step of treating the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semiconductor material with a halogen containing substance comprises: 
 exposing the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semiconductor material to the vapor of the halogen containing substance for a predetermined time at a specific temperature; and    annealing the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semiconductor material that have been previously exposed to the vapor of the halogen containing substance.    
     
     
         35 . A method as in  claim 34 , wherein: 
 the temperature at which the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semiconductor material are exposed to the vapor of the halogen containing substance is suitable for depositing a film of the halogen containing substance onto the one or more layers of p-type IIB/VIB semiconductor material; and    the step of annealing the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semiconductor material is performed at a temperature suitable for treating the one or more layers of n-type transparent conductive oxide and p-type IIB/VIB semidconductor material and removing the film of the previously deposited halogen containing substance.    
     
     
         36 . A method as in  claim 31 , wherein the step of forming an ohmic contact on the treated one or more layers of p-type IIB/VIB semiconductor material comprises depositing a metal compound onto the treated one or more layers of p-type semiconductor material and then annealing the treated one or more layers of p-type IIB/VIB semiconductor material.  
     
     
         37 . A method as in  36 , wherein the metal compound is a metal salt selected from the group comprising the salts of copper, silver, gold, tin, lead, antimony and mercury.  
     
     
         38 . A method as in  claim 36 , wherein the metal compound is an organometallic compound selected from the group comprising the organometallic compounds of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         39 . A method as in  claim 31 , further comprising the step of depositing an antireflective layer on an opposite surface of the substrate in the vacuum chamber.  
     
     
         40 . A method for fabricating semiconductor layers of a photovoltaic cell, all of the steps of which are carried out in a single vacuum chamber at a constant vacuum level, the method comprising the steps of: 
 providing, in the vacuum chamber, a substrate upon which the photovoltaic cell is to be fabricated, the substrate having one or more layers of n-type transparent conductive oxide thereon and one or more layers of n-type IIB/VIB semiconductor material on top of the one or more layers of n-type transparent conductive oxide;    heating the substrate to a desired temperature in the vacuum chamber;    depositing one or more layers of p-type IIB/VIB semiconductor material onto a surface of the substrate in the vacuum chamber;    treating the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material with a halogen containing substance in the vacuum chamber; and    forming an ohmic contact on the treated one or more layers of p-type IIB/VIB semiconductor material in the vacuum chamber.    
     
     
         41 . A method as in  claim 40 , wherein the n-type IIB/VIB semiconductor material comprises cadmium sulfide.  
     
     
         42 . A method as in  claim 40 , wherein the p-type IIB/VIB semiconductor material comprises cadmium telluride.  
     
     
         43 . A method as in  claim 40 , wherein the halogen containing substance comprises cadmium chloride.  
     
     
         44 . A method as in  claim 40 , wherein the step of treating the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material with a halogen containing substance comprises: 
 exposing the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material to the vapor of the halogen containing substance for a predetermined time at a specific temperature; and    annealing the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material that have been previously exposed to the vapor of the halogen containing substance.    
     
     
         45 . A method as in  claim 44 , wherein: 
 the temperature at which the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material are exposed to the vapor of the halogen containing substance is suitable for depositing a film of the halogen containing substance upon the one or more layers of p-type IIB/VIB semiconductor material; and    the step of annealing the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material is performed at a temperature suitable for treating the one or more layers of n-type IIB/VIB semiconductor material and p-type IIB/VIB semiconductor material and removing the film of the previously deposited halogen containing substance.    
     
     
         46 . A method as in  claim 40 , wherein the step of forming an ohmic contact on the treated one or more layers of p-type IIB/VIB semiconductor material comprises depositing a metal compound onto the treated one or more layers of p-type IIB/VIB semiconductor material and then annealing the treated one or more layers of p-type IIB/VIB semiconductor material.  
     
     
         47 . A method as in  claim 46 , wherein the metal compound is a metal salt selected from the group comprising the salts of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         48 . A method as in  claim 46 , wherein the metal compound is an organometallic compound selected from the group comprising the organometallic compounds of copper, silver, gold, tin, lead, antimony, and mercury.  
     
     
         49 . A method as in  claim 40 , further comprising the step of depositing an antireflective layer on an opposite surface of the substrate in the vacuum chamber.  
     
     
         50 . A method as in  claim 40 , further comprising the step of treating the one or more layers of n-type IIB/VIB semiconductor material with a halogen containing substance prior to depositing the one or more layers of p-type IIB/VIB semiconductor material.  
     
     
         51 . A method as in  claim 50 , wherein the halogen containing substance comprises cadmium chloride.  
     
     
         52 . A method as in  claim 50 , wherein the step of treating the one or more layers of n-type IIB/VIB semiconductor material with a halogen containing substance comprises: 
 exposing the one or more layers of n-type IIB/VIB semiconductor material to the vapor of the halogen containing substance for a predetermined time at a specific temperature; and    annealing the one or more layers of n-type IIB/VIB semiconductor material that has been previously exposed to the vapor of the halogen containing substance.    
     
     
         53 . A method as in  claim 50 , wherein: 
 the temperature at which the one or more layers of n-type IIB/VIB semiconductor material is exposed to the vapor of the halogen containing substance is suitable for depositing a film of the halogen containing substance onto the one or more layers of n-type IIB/VIB semiconductor material; and    the step of annealing the one or more layers of n-type IIB/VIB semiconductor material is performed at a temperature suitable for treating the one or more layers of n-type IIB/VIB semiconductor material and removing the film of the previously deposited halogen containing substance.