US2004058478A1PendingUtilityA1

Taped lead frames and methods of making and using the same in semiconductor packaging

Priority: Sep 25, 2002Filed: Sep 25, 2002Published: Mar 25, 2004
Est. expirySep 25, 2022(expired)· nominal 20-yr term from priority
H10W 90/756H10W 90/736H10W 90/726H10W 74/00H10W 72/07504H10W 72/07304H10W 72/07204H10W 72/5363H10W 72/951H10W 72/884H10W 72/551H10W 72/536H10W 72/0198H10W 72/075H10W 72/073H10W 74/111H10W 74/014H10W 72/20H10W 70/688H10W 74/019H10W 70/40
35
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Claims

Abstract

The invention provides a taped lead frame for use in manufacturing electronic packages. The taped lead frame is composed of a tape and a lead frame formed from a plurality of individual metal features attached to the tape and arranged in a footprint pattern. The method of making the invention enables the thickness of conventional frames to shrink significantly to result in thinner packages for improved heat dissipation and shorter geometries for improved electrical performance. A plurality of such lead frames are arranged in an array on a sheet of tape and each lead frame is separated from surrounding lead frames by street regions on the tape such that no metal feature extends into a street region. Integrated circuit chips are attached and electrically connected to the lead frames and an encapsulant is applied, cured and dried over the lead frames and the street regions. Thereafter, the tape is removed and the lead frames are singulated by cutting through the encapsulant in the street regions to form individual packages. Singulation occurs in the street regions and does not cut into any metal feature forming the lead frame.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A taped lead frame comprising: 
 a tape; and    a lead frame formed from a plurality of individual metal features attached to the tape and arranged in a footprint pattern for providing support and electrical connection to an integrated circuit chip, each metal feature electrically isolated from the other metal features in the pattern.    
     
     
         2 . The taped lead frame according to  claim 1 , further comprising a wire-bondable and solderable composition pre-plated on either or both a first and second surface of each metal feature.  
     
     
         3 . The taped lead frame according to  claim 2 , wherein the wire-bondable and solderable composition is Ni—Pd—Au-strike.  
     
     
         4 . The taped lead frame according to  claim 1 , wherein the tape and metal features are attached by an adhesive on the tape.  
     
     
         5 . The taped lead frame according to  claim 1 , wherein the tape and metal features are attached by lamination.  
     
     
         6 . The taped lead frame according to  claim 1 , wherein the metal features are screen printed onto a disposable tape, film, including glass film, or other carrier equivalents.  
     
     
         7 . The taped lead frame according to  claim 1 , further comprising a stiffener disposed on a lower surface of the tape.  
     
     
         8 . The taped lead frame according to  claim 1 , wherein the metal features have a thickness of about 1-4 mils.  
     
     
         9 . The taped lead frame according to  claim 1 , wherein the metal features have a thickness of less than about 1 mil.  
     
     
         10 . The taped lead frame according to  claim 1 , wherein the tape comprises a plastic material.  
     
     
         11 . The taped lead frame according to  claim 10 , wherein the tape comprises POLYIMIDE, MYLAR, KAPTON, or Fr-4.  
     
     
         12 . The taped lead frame according to  claim 1 , wherein the metal features in the footprint pattern include a die pad for supporting an integrated circuit chip and lead contacts for electrically connecting the lead frame to the chip.  
     
     
         13 . The taped lead frame according to  claim 12 , wherein the lead frame provides support and connection for a wire bonded chip.  
     
     
         14 . The taped lead frame according to  claim 1 , wherein the metal features in the footprint pattern include lead contacts for supporting an integrated circuit chip and for electrically connecting the lead frame to the chip.  
     
     
         15 . The taped lead frame according to  claim 14 , wherein the lead frame provides support and connection for a flip-chip or a land grid array chip.  
     
     
         16 . The taped lead frame according to  claim 1 , wherein the tape is removable from the metal features by peeling, dissolving or back patterning.  
     
     
         17 . An array of taped lead frames for mass producing electronic packages comprising: 
 a tape; and    a plurality of individual metal lead frames attached to the tape, each lead frame separated from adjacent lead frames by street regions on the tape, each lead frame comprising a plurality of individual metal features arranged in a footprint pattern, each metal feature electrically isolated from other metal features in a pattern and no metal feature extending into a street region.    
     
     
         18 . The array of taped lead frames according to  claim 17 , further comprising a wire-bondable and solderable composition pre-plated on either or both a first and second surface of each metal feature.  
     
     
         19 . The array of taped lead frames according to  claim 17 , wherein the wire-bondable and solderable composition is Ni—Pd—Au-strike.  
     
     
         20 . The array of taped lead frames according to  claim 17 , wherein the tape and metal features are attached by an adhesive on the tape.  
     
     
         21 . The array of taped lead frames according to  claim 17 , wherein the tape and metal features are attached by lamination.  
     
     
         22 . The array of taped lead frames according to  claim 17 , further comprising a stiffener disposed on a lower surface of the tape.  
     
     
         23 . The array of taped lead frames according to  claim 17 , wherein the metal features have a thickness of about 1-4 mils.  
     
     
         24 . The array of taped lead frames according to  claim 17 , wherein the metal features have a thickness of less than about 1 mil.  
     
     
         25 . The array of taped lead frames according to  claim 17 , wherein the tape comprises a plastic material.  
     
     
         26 . The array of taped lead frames according to  claim 25 , wherein the tape comprises POLYIMIDE, MYLAR, KAPTON, or Fr-4.  
     
     
         27 . The array of taped lead frames according to  claim 17 , wherein the metal features in the footprint pattern include a die pad for supporting an integrated circuit chip and lead contacts for electrically connecting the lead frame to the chip.  
     
     
         28 . The array of tape lead frames according to  claim 27 , wherein the lead frame provides support and connection for a wire bonded chip.  
     
     
         29 . The array of taped lead frames according to  claim 17 , wherein the metal features in the footprint pattern include lead contacts for supporting an integrated circuit chip and for electrically connecting the lead frame to the chip.  
     
     
         30 . The array of taped lead frames according to  claim 29 , wherein the lead frame provides support and connection for a flip-chip or a land grid array chip.  
     
     
         31 . The array of taped lead frames according to  claim 17 , wherein the tape is removable from the metal features by peeling, dissolving or back patterning.  
     
     
         32 . A method of forming a lead frame comprising the steps of: 
 providing a metal film;    attaching a tape to the film; and    patterning the film to leave a metal lead frame on the tape, the lead frame comprising a plurality of metal features arranged in a footprint pattern, each metal feature electrically isolated from the other metal features in the pattern.    
     
     
         33 . The method according to  claim 32 , further comprising the step of pre-plating an upper or lower surface of the film or both surfaces with a wire-bondable and solderable composition.  
     
     
         34 . The method according to  claim 33 , wherein the composition is Ni—Pd—Au-strike.  
     
     
         35 . The method according to  claim 32 , wherein the tape and film are attached by an adhesive on the tape.  
     
     
         36 . The method according to  claim 32 , wherein the tape and the film are attached by lamination.  
     
     
         37 . The method according to  claim 32 , wherein the metal features are screen printed onto a disposable tape, film, including glass film, or other carrier equivalents.  
     
     
         38 . The method according to  claim 32 , further comprising the steps of attaching a stiffener to the tape; and removing the stiffener before removing the tape.  
     
     
         39 . The method according to  claim 32 , wherein the film has a thickness of about 1-4 mils.  
     
     
         40 . The method according to  claim 32 , wherein the film has a thickness of less than about 1 mil.  
     
     
         41 . The method according to  claim 32 , wherein the tape comprises a plastic.  
     
     
         42 . The method according to  claim 41 , wherein the tape comprises POLYIMIDE, MYLAR, KAPTON, or Fr-4.  
     
     
         43 . The method according to  claim 32 , wherein the metal features in the footprint pattern include a die pad for supporting the integrated circuit chip and lead contacts for electrically connecting the lead frame to the chip.  
     
     
         44 . The method according to  claim 43 , wherein the lead frame provides support and connection for a wire-bonded chip.  
     
     
         45 . The method according to  claim 32 , wherein the metal features in each footprint pattern include lead contacts for supporting an integrated circuit chip and for electrically connecting the lead frame to the chip.  
     
     
         46 . The method according to  claim 45 , wherein the lead frame provides support and electrical connection for a flip-chip or land grid array chip.  
     
     
         47 . A method of forming an electronic package comprising the steps of: 
 providing a metal film;    attaching a tape to the film;    patterning the film to leave a metal lead frame on the tape, the lead frame comprising a plurality of metal features arranged in a footprint pattern, each metal feature electrically isolated from the other metal features in the pattern;    attaching and electrically connecting an integrated circuit chip to the metal features of the lead frame;    encapsulating the lead frame on the tape;    removing the tape; and    singulating the encapsulant without singulating any metal feature to form an electronic packages.    
     
     
         48 . The method according to  claim 47 , further comprising the step of pre-plating an upper or lower surface of the film or both surfaces with a wire-bondable and solderable composition.  
     
     
         49 . The method according to  claim 48 , wherein the composition is Ni—Pd—Au-strike.  
     
     
         50 . The method according to  claim 47 , wherein the tape and film are attached by an adhesive on the tape.  
     
     
         51 . The method according to  claim 47 , wherein the tape and the film are attached by lamination.  
     
     
         52 . The method according to  claim 47 , wherein the metal features are screen printed onto a disposable tape, film, including glass film, or other carrier equivalents.  
     
     
         53 . The method according to  claim 47 , further comprising the steps of attaching a stiffener to the tape; and removing the stiffener before removing the tape.  
     
     
         54 . The method according to  claim 47 , wherein the film has a thickness of about 1-4 mils.  
     
     
         55 . The method according to  claim 47 , wherein the film has a thickness of less than about 1 mil.  
     
     
         56 . The method according to  claim 47 , wherein the tape comprises a plastic.  
     
     
         57 . The method according to  claim 53 , wherein the tape comprises POLYIMIDE, MYLAR, KAPTON, or Fr-4.  
     
     
         58 . The method according to  claim 47 , wherein the metal features in the footprint pattern include a die pad for supporting the integrated circuit chip and lead contacts for electrically connecting the lead frame to the chip.  
     
     
         59 . The method according to  claim 58 , wherein the integrated circuit chip is attached to the die pad by epoxy, solder, or other eutectic metals.  
     
     
         60 . The method according to  claim 55 , wherein the lead frame provides support and connection for a wire-bonded chip.  
     
     
         61 . The method according to  claim 47 , wherein the metal features in each footprint pattern include lead contacts for supporting an integrated circuit chip and for electrically connecting the lead frame to the chip.  
     
     
         62 . The method according to  claim 57 , wherein the lead frame provides support and electrical connection for a flip-chip or land grid array chip.  
     
     
         63 . The method according to  claim 47 , wherein the tape is removed by peeling, dissolving or back patterning the tape away from the metal features and the encapsulant to expose the footprint pattern of the lead frame.  
     
     
         64 . The method according to  claim 47 , wherein the encapsulating step includes applying an encapsulant material over the lead frame in a controlled manner to flow around the metal features and up to the tape surface without creating any mold flash.  
     
     
         65 . The method according to  claim 47 , wherein the singulating step comprises sawing, laser cutting, water jet cutting or a combination thereof.  
     
     
         66 . The method according to  claim 47 , further comprising performing strip testing of the package prior to singulating the encapsulant.  
     
     
         67 . A method of forming a plurality of electronic packages comprising the steps of: 
 providing a metal film;    attaching a tape to the film;    patterning the film to leave a plurality of individual metal lead frames on the tape, each lead frame separated from adjacent lead frames by street regions on the tape, each lead frame comprising a plurality of metal features arranged in a footprint pattern and electrically isolated from one another, and no metal features extending into the street regions on the tape;    attaching and electrically connecting an integrated circuit chip to the metal features of each lead frame;    encapsulating the lead frames and the street regions on the tape;    removing the tape; and    singulating the encapsulant in the street regions to form individual electronic packages.    
     
     
         68 . The method according to  claim 67 , wherein the metal film has first and surfaces and either or both said surfaces are pre-plated with a wire-bondable and solderable composition.  
     
     
         69 . The method according to  claim 64 , wherein the composition is Ni—Pd—Au-strike.  
     
     
         70 . The method according to  claim 67 , wherein the tape and film are attached by an adhesive on the tape.  
     
     
         71 . The method according to  claim 67 , wherein the tape and the film are attached by lamination.  
     
     
         72 . The method according to  claim 67 , wherein the metal features are screen printed onto a disposable tape, film, including glass film, or other carrier equivalents.  
     
     
         73 . The method according to  claim 67 , further comprising the steps of attaching a stiffener to the tape when the tape is attached to the film; and removing the stiffener prior to removing the tape.  
     
     
         74 . The method according to  claim 67 , wherein the film has a thickness of about 1-4 mils.  
     
     
         75 . The method according to  claim 67 , wherein the film has a thickness of less than about 1 mil.  
     
     
         76 . The method according to  claim 67 , wherein the tape is composed of POLYIMIDE, MYLAR, KAPTON, or Fr-4.  
     
     
         77 . The method according to  claim 67 , wherein the metal features in each footprint pattern include a die pad for supporting the integrated circuit chip and lead contacts for electrically connecting the lead frame to the chip.  
     
     
         78 . The method according to  claim 75 , wherein the lead frames provide support and connection for a wire-bonded chip.  
     
     
         79 . The method according to  claim 67 , wherein the metal features in each footprint pattern include lead contacts for supporting an integrated circuit chip and for electrically connecting the lead frame to the chip.  
     
     
         80 . The method according to  claim 79 , wherein the integrated circuit chip is attached to the die pad by epoxy, solder, or other eutectic metals.  
     
     
         81 . The method according to  claim 79 , wherein the lead frame provides support and electrical connection for a flip-chip or land grid array chip.  
     
     
         82 . The method according to  claim 67 , wherein the plurality of lead frames are formed in an array on the tape.  
     
     
         83 . The method according to  claim 67 , wherein the tape is removed by peeling, dissolving or back patterning the tape away from the metal features and the encapsulant to expose the footprint pattern of the lead frame.  
     
     
         84 . The method according to  claim 67 , wherein the encapsulating step includes applying an encapsulant material over the lead frame and in the street regions in a controlled manner to flow around the metal features and up to the tape surface without creating any mold flash.  
     
     
         85 . The method according to  claim 67 , wherein the singulating step comprises sawing, laser cutting, water jet cutting or a combination thereof.  
     
     
         86 . The method according to  claim 67 , further comprising performing strip testing of the package prior to singulating the encapsulant.

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